6,724 Microelectronics Engineering jobs in the United States

Electrical Engineer (Circuit Design)

37955 Knoxville, Tennessee International Staff Consulting

Posted 15 days ago

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Job Description

Highly regarded, privately owned company in the greater Knoxville, TN area has immediate opening for an Electrical Engineer with Analog Circuit Design experience. This is an R&D environment developing highly specialized equipment.

The Electrical Engineer will work on a small team involved in circuit design; PCB schematic and layout design; and automated test fixture development. Involved in product development from initial concept to production.

Position requires BS degree in Electrical Engineering, Computer Engineering, or similar. This is a hands-on role involving design, prototyping, and testing.

Excellent company producing a family of high-quality products. Great environment for a creative Engineer who likes developing new products.

Highly competitive salary will depend on level of experience.

Sponsorship not available.

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Circuit Design Engineer

97204 Portland, Oregon ADEX

Posted today

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Circuit Design Engineer

Resources will be required to work on client's site in Melbourne, FL. Non-local candidates will be compensated accordingly for long-term assignment in Melbourne.

Job Description:
Network Engineers support the design, implementation, and optimization of the telco network solution used to provide FTI services. The candidate will collaborate with internal and external teams, and work independently on projects, including developing telco designs based upon FTI Network requirements.

Responsibilities:
a. Evaluate telco designs in relation to the critical infrastructure and service needs for the FTI network.
b. Plan and design modern telco services to replace legacy copper-based telco solutions.
c. Implement solutions that support customer requirements.
d. Participate in after action reviews to resolve technical challenges.
e. Create and maintain documentation for engineering and NOC teams.
f. Identify areas of opportunity for automation and network optimization.
g. Manage the Telco design release workflow to meet the implementation schedule.

Required Qualifications:
a. Bachelor of Science in Electrical Engineering, Telecommunication Engineering, Computer Science, Computer Information Systems or equivalent of a 4-year accredited degree in a technical discipline
b. Degree and minimum 4 years of prior WAN Telecommunications networks experience or 2 years post-Secondary/ Associates Degree and a minimum of 8 years of prior WAN Telecommunications networks experience
c. Highly motivated and capable of developing and following detailed instructions and action plans.
d. Ability to work in a team environment and is self-directed and self-motivated.
e. Project management skills capable of adhering to deadlines and completing tasks per project schedule.
f. Strong skill set with Microsoft Office software applications.
g. Knowledge and understanding of engineering drawings and technical procedures.
h. Domain knowledge of the Telecommunications industry, including carrier services, provisioning terminology, CISCO routers and network infrastructure and IP technologies such as Pseudo Wire and Ethernet switching.
i. Ability to obtain a Public Trust Clearance security clearance.

Preferred Additional Qualifications:
a. Experience designing and implementing network technologies such as SONET, Carrier Ethernet, LTE.etc.
b. Must be able to demonstrate the ability to design, implement and support Ethernet and TDM network infrastructures.
c. Knowledge of IP technologies such as Pseudo Wire and Ethernet switching
d. Knowledge of telecommunications carrier ordering systems and processes
e. Knowledge of WAN/LAN, TDM and Voice switching systems; TCP/IP, specific routing protocols such as OSPF, BGP and RIP; VoIP, DWDM, CTI and VPN technologies
f. Experience with leading network vendors such as Cisco, Juniper, Ciena, RAD
g. Experience with database modeling software such as MetaSolv
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Circuit Design Engineer

07068 Roseland, New Jersey RX2 Solutions

Posted 6 days ago

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Job Description

TITLE: Circuit Design Engineer
TYPE: Direct Hire
LOCATION: Roseland, NJ
ONSITE/REMOTE/HYBRID: Onsite
START DATE: July/August 2025
SHIFT: Day

We are looking for an Circuit Design Engineer to join our engineering team. We are seeking a candidate with extensive technical expertise in circuit protection applications. The ideal candidate will have substantial experience in the electrical power industry and a comprehensive understanding of circuit protection requirements and design processes. Familiarity with engineering project management processes is preferred.

MAIN RESPONSIBILITIES
  • Complete system simulation and coordination, fault current calculations.
  • Prepare and deliver technical presentations for current and prospective customers.
  • Develop and maintain strong relationships with a customer base, including electrical OEMs, design offices, outside representatives, and distribution networks.
  • Lead the team in developing and implementing new technologies.
  • Set developmental goals for design engineers and assist as needed.
  • Conduct yearly performance evaluations for design engineers and assigned personnel.

QUALIFICATIONS
  • Bachelor of Science Degree in Electrical Engineering.
  • 5-10 years of experience in the circuit protection field is required.
  • Strong technical knowledge in circuit protection technology and design.
  • A hands-on approach to solving circuit protection diagrams while providing technical and commercial proposals.
  • Experience in power electronics and power systems is essential.
  • Proficiency in simulation tools such as PSpice, MATLAB, and ETAP, including DC Arc Flash analysis and coordination studies.
  • A dynamic personality with excellent interpersonal, supervisory, and presentation skills. Exceptional communication abilities across various platforms, including verbal, written, face-to-face, and telephone.
  • Advanced technical skills with keen attention to detail, capable of simplifying complex issues and demonstrating their commercial value.
  • Ability to interpret electro-technical drawings and designs.
  • Familiarity with industry standards (UL, CSA, IEC, IEEE, ANSI, NEC, etc.) and a commitment to staying updated with evolving technologies and industry requirements.
  • Capability to work across various voltage levels and high current engineering challenges.
  • Strong organizational skills, with the ability to prioritize and manage multiple tasks efficiently despite tight deadlines.
  • Willingness to travel frequently within North America; bilingual (Spanish) is a plus.
  • Proficiency with Microsoft Office and strong problem-solving skills.

EOE STATEMENT
We are an equal opportunity employer. We do not discriminate or allow discrimination on the basis of race, color, religion, creed, sex (including pregnancy, childbirth, breastfeeding, or related medical conditions), age, sexual orientation, gender identity, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, disability, status as a crime victim, protected veteran status, political affiliation, union membership, or any other characteristic protected by law.
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Advanced Electrical Engineer, Circuit Design

22110 Manassas, Virginia The Computer Merchant, LTD.

Posted today

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Job Description

JOB TITLE: Advanced Electrical Engineer, Circuit Design
JOB LOCATION: Manassas, VA
WAGE RANGE* : 60-70
JOB NUMBER :

JOB DESCRIPTION: Our client, a large defense contractor, has an immediate opening f.
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Telecom Circuit Design Engineer

77592 Texas City, Texas ADEX

Posted today

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Job Description

Telecom Circuit Design Engineer

Resources will be required to work on client's site in Melbourne, FL. Non-local candidates will be compensated accordingly for long-term assignment in Melbourne.

Job Description:
Network Engineers support the design, implementation, and optimization of the telco network solution used to provide FTI services. The candidate will collaborate with internal and external teams, and work independently on projects, including developing telco designs based upon FTI Network requirements.

Responsibilities:
a. Evaluate telco designs in relation to the critical infrastructure and service needs for the FTI network.
b. Plan and design modern telco services to replace legacy copper-based telco solutions.
c. Implement solutions that support customer requirements.
d. Participate in after action reviews to resolve technical challenges.
e. Create and maintain documentation for engineering and NOC teams.
f. Identify areas of opportunity for automation and network optimization.
g. Manage the Telco design release workflow to meet the implementation schedule.

Required Qualifications:
a. Bachelor of Science in Electrical Engineering, Telecommunication Engineering, Computer Science, Computer Information Systems or equivalent of a 4-year accredited degree in a technical discipline
b. Degree and minimum 4 years of prior WAN Telecommunications networks experience or 2 years post-Secondary/ Associates Degree and a minimum of 8 years of prior WAN Telecommunications networks experience
c. Highly motivated and capable of developing and following detailed instructions and action plans.
d. Ability to work in a team environment and is self-directed and self-motivated.
e. Project management skills capable of adhering to deadlines and completing tasks per project schedule.
f. Strong skill set with Microsoft Office software applications.
g. Knowledge and understanding of engineering drawings and technical procedures.
h. Domain knowledge of the Telecommunications industry, including carrier services, provisioning terminology, CISCO routers and network infrastructure and IP technologies such as Pseudo Wire and Ethernet switching.
i. Ability to obtain a Public Trust Clearance security clearance.

Preferred Additional Qualifications:
a. Experience designing and implementing network technologies such as SONET, Carrier Ethernet, LTE.etc.
b. Must be able to demonstrate the ability to design, implement and support Ethernet and TDM network infrastructures.
c. Knowledge of IP technologies such as Pseudo Wire and Ethernet switching
d. Knowledge of telecommunications carrier ordering systems and processes
e. Knowledge of WAN/LAN, TDM and Voice switching systems; TCP/IP, specific routing protocols such as OSPF, BGP and RIP; VoIP, DWDM, CTI and VPN technologies
f. Experience with leading network vendors such as Cisco, Juniper, Ciena, RAD
g. Experience with database modeling software such as MetaSolv
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Telecom Circuit Design Engineer

85223 Arizona City, Arizona ADEX

Posted 1 day ago

Job Viewed

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Job Description

Telecom Circuit Design Engineer

Resources will be required to work on client's site in Melbourne, FL. Non-local candidates will be compensated accordingly for long-term assignment in Melbourne.

Job Description:
Network Engineers support the design, implementation, and optimization of the telco network solution used to provide FTI services. The candidate will collaborate with internal and external teams, and work independently on projects, including developing telco designs based upon FTI Network requirements.

Responsibilities:
a. Evaluate telco designs in relation to the critical infrastructure and service needs for the FTI network.
b. Plan and design modern telco services to replace legacy copper-based telco solutions.
c. Implement solutions that support customer requirements.
d. Participate in after action reviews to resolve technical challenges.
e. Create and maintain documentation for engineering and NOC teams.
f. Identify areas of opportunity for automation and network optimization.
g. Manage the Telco design release workflow to meet the implementation schedule.

Required Qualifications:
a. Bachelor of Science in Electrical Engineering, Telecommunication Engineering, Computer Science, Computer Information Systems or equivalent of a 4-year accredited degree in a technical discipline
b. Degree and minimum 4 years of prior WAN Telecommunications networks experience or 2 years post-Secondary/ Associates Degree and a minimum of 8 years of prior WAN Telecommunications networks experience
c. Highly motivated and capable of developing and following detailed instructions and action plans.
d. Ability to work in a team environment and is self-directed and self-motivated.
e. Project management skills capable of adhering to deadlines and completing tasks per project schedule.
f. Strong skill set with Microsoft Office software applications.
g. Knowledge and understanding of engineering drawings and technical procedures.
h. Domain knowledge of the Telecommunications industry, including carrier services, provisioning terminology, CISCO routers and network infrastructure and IP technologies such as Pseudo Wire and Ethernet switching.
i. Ability to obtain a Public Trust Clearance security clearance.

Preferred Additional Qualifications:
a. Experience designing and implementing network technologies such as SONET, Carrier Ethernet, LTE.etc.
b. Must be able to demonstrate the ability to design, implement and support Ethernet and TDM network infrastructures.
c. Knowledge of IP technologies such as Pseudo Wire and Ethernet switching
d. Knowledge of telecommunications carrier ordering systems and processes
e. Knowledge of WAN/LAN, TDM and Voice switching systems; TCP/IP, specific routing protocols such as OSPF, BGP and RIP; VoIP, DWDM, CTI and VPN technologies
f. Experience with leading network vendors such as Cisco, Juniper, Ciena, RAD
g. Experience with database modeling software such as MetaSolv
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SRAM Circuit Design Engineer

97078 Beaverton, Oregon Apple

Posted 11 days ago

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Job Description

SRAM Circuit Design Engineer

Beaverton, Oregon, United States

Hardware

Summary

Posted: Mar 25, 2025

Role Number: 200579407

Do you have a passion for crafting entirely new solutions?

Be a part of a world-class silicon design team which delivered an incredible high performance M1 chip for our Mac line of products and chips for our flagship products (iPhone, iPad, Mac, Airpods, HomePod and Watch). As part of our Digital Custom Group (DCG), you'll take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you'll help design the foundation that allows us to bring customers experiences they've never before envisioned!

This is a highly visible role at the heart of a silicon design effort, making a critical impact delivering products to market quickly. Your designs will strongly influence CPU / GPU / SoC / Neural Engine / Camera designs in Apple's Custom Silicon group.

Description

Imagine yourself at the center of our hardware development effort. Where you will collaborate with all fields, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come up with new insights, work with a team of hardworking engineers, and implement groundbreaking techniques of Machine Learning, Circuit design in Apple's marquee products like M1 and A14 Bionic.

As an SRAM Circuit Designer for the Digital Custom Group, you will perform the following:

  • Design and implement custom digital circuits for SRAM design.
  • Work with an extraordinary logic/architecture team to formulate design specifications.
  • Define architecture/topologies optimizing for power, timing, area and yield.
  • Schematic capture, simulations/analysis, margin verifications.
  • Functional equivalency and DFT modeling.
  • Work with layout team to create optimal GDS.
  • Verify extracted GDS meets design specifications.
  • Backend verification, IR/EM
  • Write RTL, validate use-cases, verify against design schematics.
  • Support post-silicon effort to enable productization.

Minimum Qualifications

  • BS and a minimum of 10 years of relevant industry experience.

Preferred Qualifications

  • We are looking for applicants with work experience within a SoC design cycle, developing circuits and SRAM/Register File for low power, low voltage and high performance.

  • Knowledge of Cache design/architecture, memory hierarchy is a huge plus.

  • Working knowledge of RTL modeling.

  • Solid understanding of industry-standard design tools.

  • Deep understanding of nanometer device physics, leakage mechanisms, technology interactions with device behavior.

  • Ability to devise experiments and analyze data for silicon debug.

  • Machine Learning algorithms (ML) and scripting is a big plus.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program ( .

Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you're applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

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SerDes Circuit Design Engineer

27518, North Carolina Apple

Posted 12 days ago

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Job Description

SerDes Circuit Design Engineer

Cary, North Carolina, United States

Hardware

Summary

Posted: Nov 21, 2024

Role Number: 200580044

We are seeking experienced Analog Mixed-Signal designers to join our high-speed SerDes team.

Our team specializes in building next generation high-performance wireline transceivers delivering intellectual-property (IP) for Apple's world-leading system-on-chip (SOC)!

In this role, you will actively work with cross-functional Analog Mixed-Signal design teams to create state-of-the-art IPs key to Apple's products.

You will be challenged to make the best-in-class designs to surprise and delight Apple customers. With transforming the user experience in focus, you will get an opportunity to work on designs which makes the best systems. This enables you to learn to end-to-end system while exceeding the highest expectations of quality, innovation and efficiency.

If you have strong fundamentals and a track record of tackling technical challenges,

If you are passionate about learning new skills and improving the value of your work,

If you like to be tuned to the bigger-picture while diving deeply into the details to innovate and solve problems,

We invite you to join and grow with our team!

Description

We work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO, LDO) with best in class power, performance, and area (PPA).

We lead discussions with multi-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations and behavioral modeling. We work closely with SOC teams to deliver IP views and ensure they meet the quality standards. While developing these complex IPs on regular basis, we interact with peers/management to communicate progress, discuss new ideas and drive new implementations/concepts making it an exciting and growth-oriented work environment.

Minimum Qualifications

  • BSEE with 10+ years of proven experience.

Preferred Qualifications

  • The ideal candidate should have deep understanding of AMS design with experience in high-speed serial links.

  • Solid understanding of designing AMS circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters

  • Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques

  • Deep understanding and experience with digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)

  • Proven experience working on system and architecture teams to drive block-level and IP requirements

  • Proven track record working with large teams and guiding junior engineers

  • Experience with high speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts

  • Experience and proven understanding of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 20+ Gbps NRZ and PAM applications

  • Experience with EQ adaptation methods and circuit interactions to improve PPA

  • Solid understanding of CDR architectures and implementations

  • Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)

  • Hands-on experience to drive lab testing, debug and data analysis

  • Hands-on experience in advanced CMOS technologies, design with FinFet technology

  • Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization

  • EXPERIENCE IN THE FOLLOWING AREAS IS A PLUS

  • Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime)

  • Concepts of IP delivery and quality checks

  • Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is helpful

  • Skills in scripting and automation to improve efficiency are highly desirable

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program ( .

Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you're applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

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SerDes Circuit Design Engineer

97078 Beaverton, Oregon Apple

Posted 13 days ago

Job Viewed

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Job Description

SerDes Circuit Design Engineer

Beaverton, Oregon, United States

Hardware

Summary

Posted: Jul 09, 2025

Role Number: 200589725

We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team specializes in building next generation high-performance wireline transceivers delivering intellectual-property (IP) for Apple's world-leading system-on-chip (SOC). In this role, you will actively work with cross-functional Analog Mixed-Signal design teams to create, execute and drive state-of-the-art IPs key to Apple's products. You will be challenged to make the best-in-class designs to surprise and delight Apple customers. With transforming the user experience in focus you will get an opportunity to work on designs which makes the best systems. This enables you to learn end-to-end system while exceeding the highest expectations of quality, innovation and efficiency.

If you have strong fundamentals and a track record of tackling technical challenges, If you are passionate about learning new skills and improving the value of your work, If you like to be tuned to the bigger-picture while diving deeply into the details to innovate and tackle problems. We invite you to join and grow with our team

Description

You will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO, LDO) with best in class power, performance, and area (PPA). You will be leading discussions with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations and behavioral modeling. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs, on regular basis you will interact with your peers/management to communicate progress, discuss new ideas and drive new implementations/concepts making it a rewarding and growth-oriented work environment.

Minimum Qualifications

  • BSEE with 3+ years of proven experience.

Preferred Qualifications

  • The ideal candidate should have deep understanding of analog mixed-signal design with experience in high-speed serial links.

  • Solid understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters

  • Solid understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques

  • Solid understanding and experience with digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)

  • Proven track record of working with system and architecture teams to drive block-level and IP requirements

  • Proven track record of working with large teams and guiding junior engineers

  • Experience with high speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts

  • Experience and solid understanding of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 64-100+ Gbps NRZ and PAM applications

  • Experience with EQ adaptation methods and circuit interactions to improve PPA

  • Solid understanding of CDR architectures and implementations

  • Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)

  • Hands-on experience to drive lab testing, debug and data analysis

  • Hands-on experience in advanced CMOS technologies, design with FinFet technology

  • Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization

  • Experience in the following areas is a plus

  • Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime)

  • Concepts of IP delivery and quality checks

  • Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired

  • Skills in scripting and automation to enhance efficiency are highly desirable

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program ( .

Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you're applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

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Circuit Design Engineering Lead

78716 Austin, Texas Apple

Posted 13 days ago

Job Viewed

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Job Description

Circuit Design Engineering Lead

Austin, Texas, United States

Hardware

Summary

Posted: Oct 15, 2024

Role Number: 200573500

In this role, you will actively work within and overlook Analog-Mixed/Signal design team and participate in bring-up of embedded circuits; collaborating with many disciplines to enable the world's premiere products. You will closely work with and lead a talented group of Analog-Mixed/Signal designers working diligently to deliver hard IPs to Apple's products while exceeding the highest expectations of quality, innovation and efficiency. At Apple, we work every single day to craft products that enrich people's lives. And in doing so face challenges as SOC/PHY design complexity. If you have strong fundamentals and a track record of tackling technical challenges. If you are passionate about learning new skills and improving the value of your work. If you like to be tuned to the bigger-picture while diving deeply into the details to innovate and tackle problems! We have an opportunity for a forward-thinking and especially hardworking analog mixed signal engineer with background in high speed serial links circuit blocks. As a member of our team with multifaceted strengths, you will have the rare and exciting opportunity to work on upcoming products that will surprise and delight millions of Apple's customers. And all of this while enjoying a strong culture where you own your career!

Description

We have ownership AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, clock generation and distribution, etc.) You will be working with multi-functional teams to define requirements/specs (e.g., modeling, package, board, DFT, ESD, etc.), crafting block-level specifications based on link-budget, behavioral modeling, and transistor-level feasibility. You will also drive mask design to implement layout view of designs. We also are working on Generation/QA of various IP Kit views/files for release to IP consumers, defining production/bench-level testplans, and conducting design reviews of blocks with peers/management to show design meets spec targets and requirements. Work closely with team members to improve methodology and flow.

Minimum Qualifications

  • BSEE with 10+ years of proven experience.

  • Previous experience in leading analog and mixed signal teams.

Preferred Qualifications

  • The ideal candidate should have demonstrated strong leadership experience, in both people management and project driving. Deep understanding of analog mixed-signal design with experience in high-speed serial links.

  • Solid understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters

  • In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques

  • Experience with Tx/Rx equalization techniques and circuits like de-emphasis, CTLE, DFE

  • Experience with high speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.)

  • Familiarity with CDR architectures and implementations

  • Design experience in advanced CMOS technologies, design with FinFet technology

  • Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization

  • Experience in lab testing of high-speed serial links

  • Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, SATA, etc.)

  • Adept at collaboration with cross functional leaders with strong interpersonal skills

  • Work closely with team members to improve methodology and flow.

  • MS or PHD preferred.

  • EXPERIENCE IN THE FOLLOWING AREAS IS DESIRABLE:

  • Static timing analysis tools (e.g., Nanotime, Primetime, etc.)

  • Modeling of digitally assisted analog adaptive loops (using C, Matlab or Python, etc.)

  • Able to build VerilogA/AMS behavioral models

  • Able to analyze and lead characterization data from lab and volume testing

  • Knowledge of ESD requirements

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program ( .

Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you're applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

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  10. account_balance Banking & Finance
  11. local_florist Beauty & Wellness
  12. restaurant Catering
  13. volunteer_activism Charity & Voluntary
  14. science Chemical Engineering
  15. child_friendly Childcare
  16. foundation Civil Engineering
  17. clean_hands Cleaning & Sanitation
  18. diversity_3 Community & Social Care
  19. construction Construction
  20. brush Creative & Digital
  21. currency_bitcoin Crypto & Blockchain
  22. support_agent Customer Service & Helpdesk
  23. medical_services Dental
  24. medical_services Driving & Transport
  25. medical_services E Commerce & Social Media
  26. school Education & Teaching
  27. electrical_services Electrical Engineering
  28. bolt Energy
  29. local_mall Fmcg
  30. gavel Government & Non Profit
  31. emoji_events Graduate
  32. health_and_safety Healthcare
  33. beach_access Hospitality & Tourism
  34. groups Human Resources
  35. precision_manufacturing Industrial Engineering
  36. security Information Security
  37. handyman Installation & Maintenance
  38. policy Insurance
  39. code IT & Software
  40. gavel Legal
  41. sports_soccer Leisure & Sports
  42. inventory_2 Logistics & Warehousing
  43. supervisor_account Management
  44. supervisor_account Management Consultancy
  45. supervisor_account Manufacturing & Production
  46. campaign Marketing
  47. build Mechanical Engineering
  48. perm_media Media & PR
  49. local_hospital Medical
  50. local_hospital Military & Public Safety
  51. local_hospital Mining
  52. medical_services Nursing
  53. local_gas_station Oil & Gas
  54. biotech Pharmaceutical
  55. checklist_rtl Project Management
  56. shopping_bag Purchasing
  57. home_work Real Estate
  58. person_search Recruitment Consultancy
  59. store Retail
  60. point_of_sale Sales
  61. science Scientific Research & Development
  62. wifi Telecoms
  63. psychology Therapy
  64. pets Veterinary
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