11 Chip jobs in the United States

Job Description

Job Description

Description:

The Chip Spinner – Material Handler is responsible for operating chip spinning equipment to separate cutting fluids from metal chips, ensuring efficient recycling and disposal. This role also includes handling raw materials, finished goods, and scrap in a safe and organized manner to support production flow.

Responsibilities:

• Operate chip spinner machinery to process metal chips and recover coolant/oil.
• Monitor equipment performance and perform basic maintenance or report issues.
• Collect, transport, and sort metal chips from machining areas.
• Safely handle and move materials.
• Maintain cleanliness and organization of chip collection and disposal areas.
• Assist with inventory and deliver material to the machine shop for production.
• Follow safety protocols and wear appropriate PPE.
• Document material movements as required.

Requirements:

• High school diploma or equivalent.
• Prior experience in material handling or manufacturing preferred.
• Operate material handling equipment
• Basic mechanical aptitude and understanding of industrial equipment.
• Strong attention to detail and commitment to safety.
• Ability to lift to 50 lbs. and work in a physically demanding environment.

Preferred Skills:

• Familiar with chip processing equipment.
• Basic computer skills for logging and reporting.

**Work Schedule**
Standard (Mon-Fri)
**Environmental Conditions**
Office
**Job Description**
As the Senior Manager, Bioinformatics, you will manage and provide technical leadership to our genetic sciences bioinformatics team responsible for custom array designs for genetic analysis in research, human health, and agricultural genomics. Leading this team requires a good understanding of both population-scale studies as well as an understanding of the importance of a variety of individual markers that might be important in a given study. You will partner with R&D bioinformatics leaders to ensure we are applying the state-of-the-art array design capabilities in a consistent high throughput setting. This position reports directly to the Director, Microarray Laboratory and Bioinformatics Services.
**Key Responsibilities:**
**Customer Centric**
+ Work directly with customers and collaborators to collect project goals and analysis requirements to meet their scientific goals.
+ Effectively work with cross-functional teams such as Sales, Marketing, Finance, Support, Purchasing, and Research and Development. Ensure these teams are aligned to meet and/or exceed customer needs.
+ Ensure the protection and confidentiality of all customer data.
**People and Technical Leadership**
+ Select, develop, and evaluate personnel for talent management, including leadership growth and key skill-set development for operational and strategic objectives.
+ Ability to mentor staff on good computational practices, including documentation and consistent analysis.
+ Influences and motivates staff to deliver.
**Operational Excellence**
+ Develop policies and procedures, for consistent, high quality custom designs as associated analysis files.
+ Own the day-to-day operations of the array design team.
+ Coordinate creation and maintenance of SOP's and training.
+ Coordinate the resource planning and scheduling for the team.
**Results**
+ High visibility & proactive leadership of team. Present and on-site, acting daily to build successful work environment for team.
+ Establish, monitor, and report key performance Indicators for the array designs and analysis files.
**Qualifications:**
+ MS in Bioinformatics, Genetics, Computational Biology or related field, plus 5+ years work experience; PhD preferred
+ Strong communications, both written and oral
+ 4+ years-experience leading technical teams
+ Ability to code in a high level language such as python or R
+ Familiarity with relational databases
+ Familiarity with Microarray analysis and NextGen Sequencing
+ Experienced in life sciences, genetics
+ Demonstrates and drives the Thermo Fisher values - Integrity, Intensity, Involvement and Innovation
At Thermo Fisher Scientific, each one of our 100,000 extraordinary minds have a unique story to tell. Join us and contribute to our singular mission-enabling our customers to make the world healthier, cleaner and safer.
We offer competitive remuneration, annual incentive plan bonus scheme, healthcare, company pension, and a range of employee benefits!
Thermo Fisher Scientific is an EEO/Affirmative Action Employer and does not discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other legally protected status.
We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
**Compensation and Benefits**
The salary range estimated for this position based in California is $163,100.00-$220,000.00.
This position may also be eligible to receive a variable annual bonus based on company, team, and/or individual performance results in accordance with company policy. We offer a comprehensive Total Rewards package that our U.S. colleagues and their families can count on, which includes:
+ A choice of national medical and dental plans, and a national vision plan, including health incentive programs
+ Employee assistance and family support programs, including commuter benefits and tuition reimbursement
+ At least 120 hours paid time off (PTO), 10 paid holidays annually, paid parental leave (3 weeks for bonding and 8 weeks for caregiver leave), accident and life insurance, and short- and long-term disability in accordance with company policy
+ Retirement and savings programs, such as our competitive 401(k) U.S. retirement savings plan
+ Employees' Stock Purchase Plan (ESPP) offers eligible colleagues the opportunity to purchase company stock at a discount
For more information on our benefits, please visit: Fisher Scientific is an EEO/Affirmative Action Employer and does not discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other legally protected status.

**Job Details:**
**Job Description:**
**Do Something Wonderful!**
Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
**Who We Are**
Become a key member of a team participating in the Integration and Verification of a future Intel CPU. This position requires and Engineer with broad Physical Design and Static Timing Analysis skills, coupled with leadership skills necessary to drive methodology and to collaborate effectively with multiple functional teams within the CPU design team.
**Who** **You Are**
We are looking for a highly motivated and technically savvy experienced engineer to drive the timing convergence for Full-Chip models.
Responsibilities may include but are not limited to:
+ As a FC Design Engineer, you will perform constraints management and STA verification.
+ You will also be responsible for coordinating collateral handoffs between the FC Design team and other functions within back-end design such as Clocking, Power Delivery and Partition synthesis/APR.
+ You will drive timing closure and provide collateral for SOC drops.
Behavioral skills we are looking for:
+ Excellent written and oral presentation skills, and willing to work across multiple organizations and geographies.
+ Effective team player with continuous learning mindset.
+ Strong analytical and problem-solving skills.
+ Be willing to balance multiple tasks.
+ Self-starter with a collaborative spirit, comfortable asking for help when needed.
**Qualifications:**
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
**Minimum Qualifications**
+ The candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering or similar field with 4+ years' of relevant experience or Master's Degree in Electrical Engineering, Computer Engineering or similar field with 3+ years' of relevant experience
**Preferred Qualifications**
+ Experience with Static Timing Analysis using PrimeTime
+ Experience with Scripting in one or more of the following languages (TCL, Perl, or Python)
+ Experience with verification of power crossing ie. VC-static (VC LP), UPF
**Job Type:**
Experienced Hire
**Shift:**
Shift 1 (United States of America)
**Primary Location:**
Virtual US
**Additional Locations:**
**Business group:**
The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
**Posting Statement:**
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
**Position of Trust**
N/A
**Benefits:**
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Salary Range for jobs which could be performed in the US:
$139, ,680.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
**Work Model for this Role**
This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.The application window for this job posting is expected to end by 10/09/2026

Our client is seeking a visionary Principal Hardware Engineer to lead the design and development of next-generation integrated circuits. This role demands deep expertise in complex digital and analog circuit design, verification, and physical implementation. You will be instrumental in architecting high-performance, power-efficient semiconductor solutions that push the boundaries of current technology. The ideal candidate will have a proven ability to mentor junior engineers, drive technical strategy, and collaborate effectively with cross-functional teams, including software, firmware, and systems engineering. This is a hands-on role for an individual passionate about innovation in semiconductor technology.

Key Responsibilities:

• Architect, design, and verify complex digital and mixed-signal integrated circuits (ICs) for cutting-edge applications.
• Lead the development of RTL (Verilog/VHDL), synthesis, place-and-route, timing closure, and physical verification.
• Develop and implement robust verification methodologies, including simulation, formal verification, and emulation.
• Collaborate with system architects and firmware engineers to define hardware requirements and ensure seamless integration.
• Analyze performance, power, and area (PPA) trade-offs to optimize chip designs.
• Troubleshoot and debug complex hardware issues encountered during design, validation, and bring-up.
• Mentor and guide junior hardware engineers, fostering technical growth and best practices.
• Stay abreast of the latest advancements in semiconductor technology, design tools, and methodologies.
• Contribute to the strategic technical roadmap for future chip development.
• Interface with manufacturing and foundries to ensure successful tape-out and production.

This is an on-site role located in San Jose, California, US . A Ph.D. or Master's degree in Electrical Engineering or a related field, coupled with 10+ years of extensive experience in IC design and verification, is essential. A strong track record of shipping successful silicon products and leadership in complex projects is required. Expertise in advanced process nodes, low-power design techniques, and modern EDA tools is highly desirable. Excellent problem-solving, communication, and teamwork skills are critical.

Job Description

Job Description

The Equipment Operator operates heavy equipment of various types to remove branches and tree material from electrical lines.

ESSENTIAL FUNCTIONS

• Always follow and help enforce safe practices and rules
• Assist in preparing equipment and materials for each day’s work at Foreperson’s direction
• Operate equipment as directed by Foreperson
• Help maintain and repair equipment and tools used in operations
• Assist other crew members in all aspects of daily activities and take a leadership role when required
• Cleans up and disposes of all debris
• Sets up barriers, warning signs, flags, markers, etc. to protect employees and public
• Keeps informed on new equipment, specifications, standard practices, operating procedures, and customer and company employee relations policies and practices.
• Track and report mileage to Foreperson
• Perform duties for storm work as needed

SUPERVISORY RESPONSIBILITIES

Equipment Operators have no direct reports.

EXPERIENCE REQUIREMENTS

Prior heavy equipment operating experience in electric utility vegetation management, construction, logging, landscaping, mechanical, or military industries preferred

EDUCATION REQUIREMENTS

High School diploma or education equivalent preferred

KNOWLEDGE, SKILLS, AND ABILITIES

• Must be knowledgeable about the daily maintenance and safe operations of all equipment used
• Must possess physical strength and good balance to climb into and around mobile equipment
• Must be able to enter and exit a vehicle numerous times a day
• Must be able to work outdoors under varying and sometimes adverse weather conditions
• Must be able to hear verbal instructions from a distance
• Must be able to obtain and maintain first-aid certification and CPR
• Must be able to wear necessary personal protective equipment (PPE)
• Must have good vision and be attentive
• Must have and maintain a Driver’s License if hired for a driving position; must have and maintain a CDL and DOT Medical Card to operate any truck over 26,000 lbs.
• Must be able to write, read and comprehend written and verbal job instructions/information
• Must be able to maintain balance over uneven terrain
• Must be able to communicate with others
• Must have endurance necessary to perform duties throughout a standard eight or ten hour day
• Must be able to travel out of town for storm restoration work when needed

This job description is not designed to cover or contain a comprehensive listing of activities, duties, or responsibilities that are required of the employee. Other duties, responsibilities, and activities may change or be assigned at any time with or without notice.

Research Associate ¿ Microreactor Chip Based Sample Delivery
Job ID
6531
Location
SLAC - Menlo Park, CA
Full-Time
Temporary
**SLAC Job Postings**
**Position Overview**
The Linac Coherent Light Source (LCLS) at SLAC National Accelerator Laboratory, a DOE national user facility operated by Stanford University, seeks a Research Associate to lead development of segmented-flow droplet microreactors for high-throughput, time-resolved X-ray studies of transient chemical and biological processes. This project will enable new science in gas¿liquid¿solid catalysis, gas¿liquid and liquid¿liquid mixing, and nucleation studies relevant to pharmaceuticals, energy storage materials, and greenhouse-gas remediation.
The Research Associate will work closely with the Sample Environment and Delivery team to integrate droplet-based microfluidic technologies into LCLS¿s existing liquid-jet delivery systems, ensuring compatibility with upcoming LCLS-II-HE operating modes. The role involves hands-on device design and fabrication, benchtop characterization (high-speed imaging, mixing/transport diagnostics), and experimental support at LCLS and SSRL. The position involves close collaboration with SLAC and Stanford teams for microfabrication, rapid prototyping, and systems integration, as well as documenting standard operating procedures, safety protocols, and experimental results.
This is a two-year fixed term position. Applicants should include a cover letter, a statement of research, a curriculum vitae including a list of publications, and names of three references with the application. Review of applications will begin immediately. Later applications may be considered at the discretion of the search committee.
SLAC is a U.S. Department of Energy (DOE) laboratory operated by Stanford University and based in Menlo Park, CA.
**Your impact:**
+ Design, fabricate, and iterate designs of segmented-flow microreactor prototypes (PDMS, glass, commercial chips).
+ Build and operate the microfluidic platform to characterize device performance: syringe/pressure pumps, controllers, valves, fittings, and tubing for multiphase flows.
+ Characterize droplets and mixing with high-speed imaging, fluorescence, and quantitative image analysis.
+ Run offline reaction and transport experiments (gas¿liquid, liquid¿liquid, particle suspensions); collect and analyze kinetic/transport data.
+ Maintain experimental records, SOPs, safety documentation, and inventory of consumables.
+ Collaborate with microfabrication engineers and vendors for rapid prototyping and materials selection.
+ Contribute to data reduction, figure generation, technical reports, and manuscripts.
**Note** : The Research Associate role is a fixed term staff position. This is a 2-year fixed term position with the possibility of extension. Assignment duration is contingent upon project needs and funding.
Applicants must provide evidence of either a recently completed PhD degree or confirmation of completion of the PhD degree requirements prior to starting the position. Applicants should also include a cover letter, a statement of research area including brief summary of accomplishments, a curriculum vitae, a list of publications, and names of at least three references from whom letters of recommendation will form part of the application.
**To be successful in this position you will bring:**
+ Ph.D. in Engineering (biomedical, electrical, mechanical, etc.), Chemistry, Biology, Physics, or related field.
+ Demonstrated experience with microfluidics, millifluidics, and microfabrication.
+ Hands-on experience with fluid handling hardware: syringe pumps, pressure controllers, fittings, and tubing.
+ Ability to lead experiments independently.
+ Ability to rapidly prototype and test new techniques
+ Experience with development of optical diagnostics (high-speed imaging, basic fluorescence microscopy) and quantitative image analysis.
+ Demonstrated record of scientific productivity through peer-reviewed publications.
+ Strong experimental troubleshooting, record keeping, and communication skills.
+ Ability to travel and participate in beamline experiments at SSRL and LCLS as required.
+ Demonstrated ability to work and communicate effectively with a diverse population.
**In addition, preferred requirements include:**
+ Prior experience with experiments at X-ray light sources (synchrotron or XFEL), or familiarity with X-ray sample-delivery constraints.
+ Microfabrication skills: soft lithography (PDMS), glass etching, metal deposition, or chip assembly.
+ Experience developing complex sample delivery systems, particularly supporting droplet based techniques as well as liquid jets.
+ Experience working with multiphase flows, gas-liquid microreactors, or solid suspensions in microchannels.
+ Experience with vacuum or helium-environment sample handling, and safe handling of hazardous reagents.
+ Programming for data analysis and automation (Python, MATLAB, or LabVIEW).
Candidates will provide evidence of either a recently completed PhD degree in the area of physics, mathematics, materials science, or a related field, and confirmation of completion of the PhD degree requirements prior to starting the position.
**SLAC Employee competencies** :
+ Effective Decisions: Uses job knowledge and solid judgment to make quality decisions in a timely manner.
+ Self-Development: Pursues a variety of venues and opportunities to continue learning and developing.
+ Dependability: Can be counted on to deliver results with a sense of personal responsibility for expected outcomes.
+ Initiative: Pursues work and interactions proactively with optimism, positive energy, and motivation to move things forward.
+ Adaptability: Flexes as needed when change occurs, maintains an open outlook while adjusting and accommodating changes.
+ Communication: Ensures effective information flow to various audiences and creates and delivers clear, appropriate written, spoken, presented messages.
+ Relationships: Builds relationships to foster trust, team collaboration, and a positive climate to achieve common goals.
**Physical requirements and working conditions** :
+ Consistent with its obligations under the law, the University will provide reasonable accommodation to any employee with a disability who requires accommodation to perform the essential functions of his or her job.
+ May work extended hours during peak business cycles.
+ The ability to travel to synchrotron and XFEL facilities around the world to perform experiments is required.
+ Given the nature of this position, onsite work is required.
**Work standards** :
+ Interpersonal Skills: Demonstrates the ability to work well with Stanford colleagues and clients and with external organizations.
+ Promote Culture of Safety: Demonstrates commitment to personal responsibility and value for environment, safety and security; communicates related concerns; uses and promotes safe behaviors based on training and lessons learned. Meets the applicable roles and responsibilities as described in the ESH Manual, Chapter 1¿General Policy and Responsibilities: Subject to and expected to comply with all applicable University policies and procedures, including but not limited to the personnel policies and other policies found in the University's Administrative Guide, **Classification Title:** Research Associate Experimental
+ **Job code:** 0127 **, Grade:** G
+ **Employment Duration:** 2 years fixed term
_The expected pay range for this position is $70,000 - $100,000 per annum. SLAC National Accelerator Laboratory/Stanford University provides pay ranges representing its good faith estimate of what the university reasonably expects to pay for a position. The pay offered to a selected candidate will be determined based on factors such as (but not limited to) the scope and responsibilities of the position, the qualifications of the selected candidate, departmental budget availability, internal equity, geographic location and external market pay for comparable jobs._
SLAC National Accelerator Laboratory is an Affirmative Action / Equal Opportunity Employer and supports diversity in the workplace. All employment decisions are made without regard to race, color, religion, sex, national origin, age, disability, veteran status, marital or family status, sexual orientation, gender identity, or genetic information. All staff at SLAC National Accelerator Laboratory must be able to demonstrate the legal right to work in the United States. SLAC is an E-Verify employer.

**Job Details:**
**Job Description:**
**Do Something Wonderful!**
Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
**Who We Are**
Become a key member of a team participating in the Integration and Verification of a future Intel CPU. This position requires and Engineer with broad Physical Design and Static Timing Analysis skills, coupled with leadership skills necessary to drive methodology and to collaborate effectively with multiple functional teams within the CPU design team.
**Who** **You Are**
We are looking for a highly motivated and technically savvy experienced engineer to drive the timing convergence for Full-Chip models.
Responsibilities may include but are not limited to:
+ As an FC Design Engineer, you will perform constraints management and STA verification.
+ You will also be responsible for coordinating collateral handoffs between the FC Design team and other functions within back-end design such as Clocking, Power Delivery and Partition synthesis/APR.
+ You will drive timing closure and provide collateral for SOC drops.
Behavior skills we are looking for:
+ Excellent written and oral presentation skills, and willing to work across multiple organizations and geographies.
+ Effective team player with continuous learning mindset.
+ Strong analytical and problem-solving skills.
+ Be willing to balance multiple tasks.
+ Self-starter with a collaborative spirit, comfortable asking for help when needed
**Qualifications:**
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
**Minimum Qualifications**
+ The candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering or similar field with 4+ years of relevant experience
+ -OR- MS degree in Electrical Engineering, Computer Engineering or similar field with 3+ years of relevant experience
+ -OR- PhD in Electrical Engineering, Computer Engineering or similar field
**Preferred Qualifications**
+ Experience with Static Timing Analysis (STA) using PrimeTime
+ Experience with Scripting in one or more of the following languages (TCL, Perl, or Python)
+ Experience with verification of power crossing ie. VC-static (VC LP), UPF
**Job Type:**
Experienced Hire
**Shift:**
Shift 1 (United States of America)
**Primary Location:**
US, Texas, Austin
**Additional Locations:**
US, Oregon, Hillsboro
**Business group:**
The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
**Posting Statement:**
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
**Position of Trust**
N/A
**Benefits:**
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Salary Range for jobs which could be performed in the US:
$139, ,680.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
**Work Model for this Role**
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

**Job Details:**
**Job Description:**
**Do Something Wonderful!**
Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
**Who We Are**
Become a key member of a team participating in the Integration and Verification of a future Intel CPU. This position requires and Engineer with broad Physical Design and Static Timing Analysis skills, coupled with leadership skills necessary to drive methodology and to collaborate effectively with multiple functional teams within the CPU design team.
**Who** **You Are**
We are looking for a highly motivated and technically savvy experienced engineer to drive the timing convergence for Full-Chip models.
Responsibilities may include but are not limited to:
+ As an FC Design Engineer, you will perform constraints management and STA verification.
+ You will also be responsible for coordinating collateral handoffs between the FC Design team and other functions within back-end design such as Clocking, Power Delivery and Partition synthesis/APR.
+ You will drive timing closure and provide collateral for SOC drops.
Behavior skills we are looking for:
+ Excellent written and oral presentation skills, and willing to work across multiple organizations and geographies.
+ Effective team player with continuous learning mindset.
+ Strong analytical and problem-solving skills.
+ Be willing to balance multiple tasks.
+ Self-starter with a collaborative spirit, comfortable asking for help when needed
**Qualifications:**
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
**Minimum Qualifications**
+ The candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering or similar field with 4+ years of relevant experience
+ -OR- MS degree in Electrical Engineering, Computer Engineering or similar field with 3+ years of relevant experience
+ -OR- PhD in Electrical Engineering, Computer Engineering or similar field
**Preferred Qualifications**
+ Experience with Static Timing Analysis (STA) using PrimeTime
+ Experience with Scripting in one or more of the following languages (TCL, Perl, or Python)
+ Experience with verification of power crossing ie. VC-static (VC LP), UPF
**Job Type:**
Experienced Hire
**Shift:**
Shift 1 (United States of America)
**Primary Location:**
US, Texas, Austin
**Additional Locations:**
US, Oregon, Hillsboro
**Business group:**
The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
**Posting Statement:**
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
**Position of Trust**
N/A
**Benefits:**
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Salary Range for jobs which could be performed in the US:
$139, ,680.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
**Work Model for this Role**
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Description
AWS Utility Computing (UC) provides product innovations - from foundational services such as Amazon's Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS's services and features apart in the industry. As a member of the UC organization, you'll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for their cloud services.
Custom machine learning chips are at the heart of our Trainium machine learning instances, and we invite you to build them with us!
As a Sr. SDE, Chip Validation Ops, you will design and implement software systems to monitor, test, and improve silicon quality across our fleet. Build scalable solutions for tracking component performance and automating quality inspection processes.
Key job responsibilities
-Develop and maintain systems to track silicon part quality metrics
-Create and scale functional, performance, logic and electrical tests
-Design and scale automated inspection mechanisms for quality control
-Collaborate with hardware teams to define test requirements and specifications
About the team
Why AWS
Amazon Web Services (AWS) is the world's most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating - that's why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.
Utility Computing (UC)
AWS Utility Computing (UC) provides product innovations - from foundational services such as Amazon's Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS's services and features apart in the industry. As a member of the UC organization, you'll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for their cloud services.
Inclusive Team Culture
Here at AWS, it's in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness.
Work/Life Balance
We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there's nothing we can't achieve in the cloud.
Mentorship and Career Growth
We're continuously raising our performance bar as we strive to become Earth's Best Employer. That's why you'll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.
Diverse Experiences
Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn't followed a traditional path, or includes alternative experiences, don't let it stop you from applying.
Basic Qualifications
-Bachelor's degree in Computer Science, Computer Engineering, or related field
-8+ years of chip design and/or embedded development experience
-Experience with test automation and continuous integration
-Knowledge of semiconductor testing methodologies
-Proficiency in one or more programming languages (C++, Python, Java)
-Experience with large-scale distributed systems
Preferred Qualifications
-Knowledge of hardware description languages (Verilog, VHDL)
-Background in test development for semiconductor devices
-Experience with statistical analysis and data visualization
-Familiarity with hardware debugging tools
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company's reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.
Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $143,300/year in our lowest geographic market up to $247,600/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit . This position will remain posted until filled. Applicants should apply via our internal or external career site.