452 Design For Testability jobs in the United States
Principal Engineer, VLSI Design Engineering

Posted today
Job Viewed
Job Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape.
Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.
Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.
**Job Description**
The Memory Technology Group is at the core of the Legacy Sandisk Engineering Organization. We are building a cutting edge 3D memory in our multi-billion dollars Fab. Our memory provides performance, power, and endurance at a lower cost without forgoing quality. The Memory Technology organization is a strategic entity for the company and we are constantly growing. Our group functions as a start-up within Sandisk, and offers a creative, fast paced, entrepreneurial work environment where you'll be at the center of innovation.
We are looking for an experienced Staff Engineer to lead and deliver projects for our Memory Design team. This is a great opportunity for a results-oriented, entrepreneurial individual who knows how to work with non-volatile memory world-class engineers and has a great track record for delivering innovative results.
You will need to think creatively about the memory as we do take pride in our craftsmanship. We do work together with all engineering teams to identify and execute on the most disciplined way. Your success will be measured by your ability to build great designs that deliver innovation that unlock revenue opportunities for the company.
Join the Memory Technology Design Team and become a leader of this highly motivated, cooperative, and focused team!
In this position, the individual will be responsible for all aspects of digital design in NAND Flash memory, focusing on micro architecture, RTL design, verification, logic synthesis, and timing analysis to deliver a design meeting target power, performance and area goals.
ESSENTIAL DUTIES AND RESPONSIBILITIES:
+ RTL design and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT, timing analysis and closure
+ Balance design trade-offs with modularity, scalability, power, area, and performance.
+ Interface with internal and external teams/customers to drive necessary technical specifications and features based on individual requirements
+ Participating in Post-Si evaluation and debug
+ Drive cross function support for productization
+ Technical guidance and mentoring of junior engineers
**Qualifications**
**REQUIRED:**
+ MSEE plus 10 years of relevant experience
+ Experience with chip level integration, chip lead, and full product life cycle (requirements, design, implementation, test) of Logic design
+ Working knowledge of the entire Logic design flow from RTL to GDSII (RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion, place-and-route, clock tree synthesis, extraction, static timing analysis, physical verification)
+ Working knowledge of NAND flash memory cell device operations, algorithms for program/read/erase
+ Excellent communication (written and verbal) and interpersonal skills
**PREFERRED:**
+ Experience developing digital circuit designs for low power operating conditions
+ Working knowledge of device physics and process
+ Working knowledge of NAND Flash memory design including Analog, Core, Datapath and IO circuits
+ Proficiency with following Digital design tools
+ Synthesis - Synopsys Design Compiler, Cadence Genus or Cadence RTL Compiler
+ Static Timing - Synopsys Primetime or Cadence Tempus
+ Place and Route - Synopsys ICC or Cadence Encounter or Innovus
+ Familiarity with revision control tool and EDA standard formats used in cell/library development and modeling - Liberty (timing model), SDC (Synopsys Design Constraints)
+ Programming experience in C, C++, Python or Perl
The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment. Self-motivated and self-directed, however, must have demonstrated ability to work well with people. A proven desire to work as a team member, both on the same team and outside of the team. Ability to troubleshoot and analyze complex problems. Ability to multi-task and meet deadlines. Excellent communication (written and verbal) and interpersonal skills.
**Additional Information**
Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the "Know Your Rights: Workplace Discrimination is Illegal ( " poster. Our pay transparency policy is available here ( .
Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.
Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.
Based on our experience, we anticipate that the application deadline will be **10/17/2025** (3 months from posting), although we reserve the right to close the application process sooner if we hire an applicant for this position before the application deadline. If we are not able to hire someone from this role before the application deadline, we will update this posting with a new anticipated application deadline.
#LI-KH1
**Compensation & Benefits Details**
+ An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs.
+ The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future.
+ You will be eligible to participate in Sandisk's Short-Term Incentive (STI) Plan, which provides incentive awards based on Company and individual performance. Depending on your role and your performance, you may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Sandisk's Standard Terms and Conditions for Restricted Stock Unit Awards.
+ We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program, employee stock purchase plan, and the Sandisk's Savings 401(k) Plan.
+ Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law.
Principal Engineer, VLSI Design Engineering

Posted today
Job Viewed
Job Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape.
Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.
Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.
**Job Description**
ESSENTIAL DUTIES AND RESPONSIBILITIES:
+ In this position, the individual will be responsible for designing, developing, modifying and evaluating Chip architecture and Core/Analog/Data Path circuit structures for feasibility study of high performance NAND flash, including new, most advanced 3-dimentional NAND memories.
+ Evaluation of these circuits will be done through HSPICE, PRIMESIM and VERILOG simulations and through silicon evaluation when the silicon arrives.
**Qualifications**
REQUIRED:
+ Requires MS or BS degree in Electrical Engineering or equivalent with 5 or more years of relevant experience.
+ Knowledge and/or experience in non-volatile memory design (NAND flash memory cell operation in particular) is a big advantage
+ A strong design & device background and experience with evaluating new process technologies for use in design is preferred.
+ The ideal candidate must have proven ability to achieve results in a fast moving, dynamic environment
+ Self-motivated and self-directed, however, must have demonstrated ability to work well with people
+ A proven desire to work as a team member, both on the same team and outside of the team
+ Ability to troubleshoot and analyze complex problems.
+ Ability to multi-task and meet deadlines.
SKILLS:
+ Excellent communication (written and verbal) and interpersonal skills.
**Additional Information**
Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the "Know Your Rights: Workplace Discrimination is Illegal ( " poster. Our pay transparency policy is available here ( .
Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.
Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.
Based on our experience, we anticipate that the application deadline will be **10/16/2025** (3 months from posting), although we reserve the right to close the application process sooner if we hire an applicant for this position before the application deadline. If we are not able to hire someone from this role before the application deadline, we will update this posting with a new anticipated application deadline.
#LI-KH1
**Compensation & Benefits Details**
+ An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs.
+ The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future.
+ You will be eligible to participate in Sandisk's Short-Term Incentive (STI) Plan, which provides incentive awards based on Company and individual performance. Depending on your role and your performance, you may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Sandisk's Standard Terms and Conditions for Restricted Stock Unit Awards.
+ We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program, employee stock purchase plan, and the Sandisk's Savings 401(k) Plan.
+ Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law.
Principal design engineer, VLSI Design Engineering

Posted today
Job Viewed
Job Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape.
Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.
Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.
**Job Description**
The Memory Technology Group is at the core of the Legacy Sandisk Engineering Organization. We are building a cutting edge 3D memory in our multiple billion dollars Fab. Our memory provides performance, power, and endurance at a lower cost but on quality. The Memory Technology organization is a strategic entity for the company, and we are growing. Our group functions as a start-up within Sandisk, and offers a creative, fast paced, entrepreneurial work environment where you'll be at the center of Sandisk innovation.
If you thrive in a fast-paced, dynamic environment, are looking to be a part of a team that is developing exciting new processes, and you are eager to take on new opportunities and challenges with a sense of urgency and enthusiasm, then this could be an exciting opportunity for you.
ESSENTIAL DUTIES AND RESPONSIBILITIES:
+ Architect and design circuits at transistor level and gate level for leading-edge 3D NAND flash memory focusing on high-speed datapath circuit design and page buffers.
+ Perform block level and full chip circuit simulations to meet all performance specifications.
+ RTL design, synthesis, static timing analysis and verification in verilog for page buffer and data path control logics.
+ Conduct silicon debugging and evaluation with micro-probing.
+ Collaborate with characterization engineers to fully characterize silicon, and partner with other designers to develop solutions for silicon issues.
+ Generate detailed technical reports and presentations.
**Qualifications**
REQUIRED:
+ Requires MS degree in Electrical Engineering or equivalent with 5 or more years of relevant experience.
+ Knowledge and/or experience in data path design (Nand and/or DRAM)
+ Knowledge in decoding concept and redundancy concept
+ Knowledge and/or experience in Nand page buffer design
+ Knowledge and/or experience in RTL design
+ Knowledge and/or experience in non-volatile memory design (NAND flash memory cell operation in particular) is a big advantage
PREFERRED:
+ Knowledge and/or experience in High speed I/O circuit is a big plus
+ A strong device background and experience with evaluating new process technologies for use in design is preferred.
**Additional Information**
Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the "Know Your Rights: Workplace Discrimination is Illegal ( " poster. Our pay transparency policy is available here ( .
Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.
Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.
Based on our experience, we anticipate that the application deadline will be **10/17/2025** (3 months from posting), although we reserve the right to close the application process sooner if we hire an applicant for this position before the application deadline. If we are not able to hire someone from this role before the application deadline, we will update this posting with a new anticipated application deadline.
#LI-KH1
**Compensation & Benefits Details**
+ An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs.
+ The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future.
+ You will be eligible to participate in Sandisk's Short-Term Incentive (STI) Plan, which provides incentive awards based on Company and individual performance. Depending on your role and your performance, you may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Sandisk's Standard Terms and Conditions for Restricted Stock Unit Awards.
+ We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program, employee stock purchase plan, and the Sandisk's Savings 401(k) Plan.
+ Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law.
Senior Technologist Engineer, VLSI Design Engineering

Posted today
Job Viewed
Job Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape.
Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.
Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.
**Job Description**
The Memory Technology Group is at the core of the Legacy Sandisk Engineering Organization. We are building a cutting edge 3D memory in our multi-billion dollars Fab. Our memory provides performance, power, and endurance at a lower cost without forgoing quality. The Memory Technology organization is a strategic entity for the company and we are constantly growing. Our group functions as a start-up and offers a creative, fast paced, entrepreneurial work environment where you'll be at the center of innovation.
We are looking for an experienced Engineer to lead and deliver projects for our Memory Design team. This is a great opportunity for a results-oriented, entrepreneurial individual who knows how to work with non-volatile memory world-class engineers and has a great track record for delivering innovative results.
You will need to think creatively about the memory as we do take pride in our craftsmanship. We do work together with all engineering teams to identify and execute on the most disciplined way. Your success will be measured by your ability to build great designs that deliver innovation that unlock revenue opportunities for the company.
Join the Memory Technology Design Team and become a leader of this highly motivated, cooperative, and focused team!
In this position, the individual will be responsible for all aspects of digital design in NAND Flash memory, focusing on micro architecture, RTL design, verification, logic synthesis, and timing analysis to deliver a design meeting target power, performance and area goals.
ESSENTIAL DUTIES AND RESPONSIBILITIES:
+ RTL design and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT, timing analysis and closure
+ Balance design trade-offs with modularity, scalability, power, area, and performance.
+ Interface with internal and external teams/customers to drive necessary technical specifications and features based on individual requirements
+ Participating in Post-Si evaluation and debug
+ Drive cross function support for productization
+ Technical guidance and mentoring of junior engineers
**Qualifications**
**REQUIRED:**
+ MSEE plus 15 years of relevant experience
+ Experience with chip level integration, chip lead, and full product life cycle (requirements, design, implementation, test) of Logic design
+ Working knowledge of the entire Logic design flow from RTL to GDSII (RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion, place-and-route, clock tree synthesis, extraction, static timing analysis, physical verification)
+ Working knowledge of NAND flash memory cell device operations, algorithms for program/read/erase
+ Excellent communication (written and verbal) and interpersonal skills
**PREFERRED:**
+ Experience leading silicon design project.
+ Experience developing digital circuit designs for low power operating conditions
+ Working knowledge of device physics and process
+ Working knowledge of NAND Flash memory design including Analog, Core, Datapath and IO circuits
+ Proficiency with following Digital design tools
+ Synthesis - Synopsys Design Compiler, Cadence Genus or Cadence RTL Compiler
+ Static Timing - Synopsys Primetime or Cadence Tempus
+ Place and Route - Synopsys ICC or Cadence Encounter or Innovus
+ Familiarity with revision control tool and EDA standard formats used in cell/library development and modeling - Liberty (timing model), SDC (Synopsys Design Constraints)
+ Programming experience in C, C++, Python or Perl
**SKILLS:**
+ The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment.
+ Self-motivated and self-directed, however, must have demonstrated ability to work well with people.
+ A proven desire to work as a team member, both on the same team and outside of the team.
+ Ability to troubleshoot and analyze complex problems.
+ Ability to multi-task and meet deadlines.
+ Excellent communication (written and verbal) and interpersonal skills.
**Additional Information**
Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the "Know Your Rights: Workplace Discrimination is Illegal ( " poster. Our pay transparency policy is available here ( .
Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.
Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.
Based on our experience, we anticipate that the application deadline will be **11/12/2025** (3 months from posting), although we reserve the right to close the application process sooner if we hire an applicant for this position before the application deadline. If we are not able to hire someone from this role before the application deadline, we will update this posting with a new anticipated application deadline.
#LI-KH1
**Compensation & Benefits Details**
+ An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs.
+ The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future.
+ You will be eligible to participate in Sandisk's Short-Term Incentive (STI) Plan, which provides incentive awards based on Company and individual performance. Depending on your role and your performance, you may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Sandisk's Standard Terms and Conditions for Restricted Stock Unit Awards.
+ We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program, employee stock purchase plan, and the Sandisk's Savings 401(k) Plan.
+ Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law.
Senior VLSI Design Engineering (New College Grad, Masters)

Posted today
Job Viewed
Job Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape.
Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.
Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.
**Job Description**
Join us and jumpstart your career alongside our team of innovators and industry influencers and help shape the future of digital technology with a leading provider of flash memory and storage solutions!
Please note: this posting is not for a specific job opening and by submitting your resume, you are expressing interest in being contacted about one of the following roles at Sandisk:
**Essential duties and responsibilities:**
+ **AI-Enhanced Chip Design** - Design Engineers will be responsible for designing, developing, modifying and evaluating Chip architecture circuit structures for feasibility study of high-performance NAND flash, including new, most advanced 3-dimentional NAND memories. A design engineer will focus on developing technologies related to AI. In this role, you will be part of a multi-disciplinary team of researchers and software developers, working on designing, building, and deploying AI technologies and applications. Familiarity with AI/ML frameworks and the interworking of LLMs are a plus
+ **Analog/Mixed-Signal Design** - NAND Memory Design & Verification Engineers are responsible for designing, developing, modifying, and evaluating analog and mixed-signal integrated circuits (ICs) for high-performance NAND flash, including the most advanced 3-dimensional NAND memories. Engineers in this role will focus on building low-power analog modules such as OPAMPs, voltage regulators, reference generators, and charge pump circuits. You will also contribute to high-voltage word line driver design, sensing operation analysis, and power/ground network optimization. This role offers the opportunity to define chip architecture, floorplan and die size by cross-collaborating with multiple functions including layout, characterization, and silicon validation teams to bring innovative circuit designs from concept to production.
+ **High-Speed PHY and Interface Design -** High-Speed PHY and Interface Design Engineers will be responsible for architecting and implementing custom high-speed PHY and DataPath circuits for NAND interfaces and memory protocols such as DDR3/4/5, LPDDR4/5, GDDR, and HBM. In this role, you will focus on clock recovery, timing budgeting, SI/PI analysis, and analog/digital co-simulation across a wide range of speeds and topologies. The ideal candidate thrives in a multi-disciplinary environment, balancing deep theoretical understanding with practical implementation. Familiarity with Cadence Virtuoso, Synopsys tools, and Verilog/Liberty model development is a plus.
+ **High-Speed Data Path & Circuit Design Engineers** - Circuit Design Engineers in this role will focus on developing and evaluating transistor-level and gate-level architectures for NAND flash memory, including page buffers, sense amplifiers, and high-speed datapath circuits and interface protocol design. You will architect and design digital and/or analog circuits, perform block level and full chip circuit simulations to meet all performance specifications. You will also contribute to RTL design, verification, clock domain crossing (CDC) and Prime time analysis. This role spans the full development lifecycle-from early feasibility and simulation to silicon probing and debug-requiring close collaboration with layout and characterization teams. Proficiency in HSPICE, FINESIM, and Verilog is essential, along with a strong foundation in analog and digital circuit fundamentals.
+ **Physical Design Engineering** - Physical Design Engineers will be responsible for logic synthesis, place and route (P&R), and timing analysis for NAND flash memory chips, ensuring designs meet performance, power, and area (PPA) targets. Engineers in this role will work closely with front-end RTL teams and back-end implementation engineers to perform physical verification, static timing analysis (STA), and tape-out readiness. You will apply deep knowledge of design principles and CAD tools to develop scalable physical design methodologies. Familiarity with scripting (e.g., Python, Perl, TCL) and an understanding of device physics in deep sub-micron technologies are a plus.
+ **Digital Design Enginee** r - Engineers in this role will be responsible for all aspects of digital design in advanced 3D NAND Flash memory, with a focus on microarchitecture, RTL design, verification, logic synthesis, and static timing analysis. The goal is to deliver designs that meet target power, performance, and area objectives. As a Digital Design Engineer, you will work on RTL design and verification using Verilog, including RTL linting, clock domain crossing (CDC) analysis, design for testing (DFT), synthesis, timing analysis, and closure. You will balance design trade-offs across modularity, scalability, power, area, and performance. In this role, you will interface with internal and external teams to define and drive technical specifications and features tailored to specific requirements. You will also participate in silicon debugging and support post-silicon validation efforts.
**Qualifications**
**Required:**
+ **Master's degree** in Electrical Engineering, Computer Engineering, Computer Science, or related field with a graduation date of **Dec 2024 - May/June 2025**
+ Experience or interest in **3D NAND Flash** and **non-volatile memory**
**Preferred Skills:**
It's helpful if you meet one or more of the following qualifications, but it isn't a requirement.
+ Strong fundamentals in circuit design, particularly analog/mixed-signal and digital
+ Experience with HSPICE, FINESIM, VERILOG, System Verilog, and RTL design
+ Proficiency in troubleshooting, problem-solving, and cross-functional teamwork
+ Excellent communication (written and verbal) and interpersonal skills
+ Eagerness to learn and adapt to new technologies and challenges
+ Self-motivated, collaborative, innovative, and adaptable to a fast-paced environment
**Additional Information**
Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the "Know Your Rights: Workplace Discrimination is Illegal ( " poster. Our pay transparency policy is available here ( .
Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.
Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.
#LI-NS1
Senior VLSI Design Engineering (New College Grad, Masters) (Milpitas)
Posted 12 days ago
Job Viewed
Job Description
Company Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable todays needs and tomorrows next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world were living in and that we have the power to shape.
Company Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable todays needs and tomorrows next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world were living in and that we have the power to shape.
Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.
Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.
Job Description
Join us and jumpstart your career alongside our team of innovators and industry influencers and help shape the future of digital technology with a leading provider of flash memory and storage solutions!
Please note: this posting is not for a specific job opening and by submitting your resume, you are expressing interest in being contacted about one of the following roles at Sandisk:
Essential Duties And Responsibilities
- AI-Enhanced Chip Design Design Engineers will be responsible for designing, developing, modifying and evaluating Chip architecture circuit structures for feasibility study of high-performance NAND flash, including new, most advanced 3-dimentional NAND memories. A design engineer will focus on developing technologies related to AI. In this role, you will be part of a multi-disciplinary team of researchers and software developers, working on designing, building, and deploying AI technologies and applications. Familiarity with AI/ML frameworks and the interworking of LLMs are a plus
- Analog/Mixed-Signal Design - NAND Memory Design & Verification Engineers are responsible for designing, developing, modifying, and evaluating analog and mixed-signal integrated circuits (ICs) for high-performance NAND flash, including the most advanced 3-dimensional NAND memories. Engineers in this role will focus on building low-power analog modules such as OPAMPs, voltage regulators, reference generators, and charge pump circuits. You will also contribute to high-voltage word line driver design, sensing operation analysis, and power/ground network optimization. This role offers the opportunity to define chip architecture, floorplan and die size by cross-collaborating with multiple functions including layout, characterization, and silicon validation teams to bring innovative circuit designs from concept to production.
- High-Speed PHY and Interface Design - High-Speed PHY and Interface Design Engineers will be responsible for architecting and implementing custom high-speed PHY and DataPath circuits for NAND interfaces and memory protocols such as DDR3/4/5, LPDDR4/5, GDDR, and HBM. In this role, you will focus on clock recovery, timing budgeting, SI/PI analysis, and analog/digital co-simulation across a wide range of speeds and topologies. The ideal candidate thrives in a multi-disciplinary environment, balancing deep theoretical understanding with practical implementation. Familiarity with Cadence Virtuoso, Synopsys tools, and Verilog/Liberty model development is a plus.
- High-Speed Data Path & Circuit Design Engineers - Circuit Design Engineers in this role will focus on developing and evaluating transistor-level and gate-level architectures for NAND flash memory, including page buffers, sense amplifiers, and high-speed datapath circuits and interface protocol design. You will architect and design digital and/or analog circuits, perform block level and full chip circuit simulations to meet all performance specifications. You will also contribute to RTL design, verification, clock domain crossing (CDC) and Prime time analysis. This role spans the full development lifecyclefrom early feasibility and simulation to silicon probing and debugrequiring close collaboration with layout and characterization teams. Proficiency in HSPICE, FINESIM, and Verilog is essential, along with a strong foundation in analog and digital circuit fundamentals.
- Physical Design Engineering - Physical Design Engineers will be responsible for logic synthesis, place and route (P&R), and timing analysis for NAND flash memory chips, ensuring designs meet performance, power, and area (PPA) targets. Engineers in this role will work closely with front-end RTL teams and back-end implementation engineers to perform physical verification, static timing analysis (STA), and tape-out readiness. You will apply deep knowledge of design principles and CAD tools to develop scalable physical design methodologies. Familiarity with scripting (e.g., Python, Perl, TCL) and an understanding of device physics in deep sub-micron technologies are a plus.
- Digital Design Engineer Engineers in this role will be responsible for all aspects of digital design in advanced 3D NAND Flash memory, with a focus on microarchitecture, RTL design, verification, logic synthesis, and static timing analysis. The goal is to deliver designs that meet target power, performance, and area objectives. As a Digital Design Engineer, you will work on RTL design and verification using Verilog, including RTL linting, clock domain crossing (CDC) analysis, design for testing (DFT), synthesis, timing analysis, and closure. You will balance design trade-offs across modularity, scalability, power, area, and performance. In this role, you will interface with internal and external teams to define and drive technical specifications and features tailored to specific requirements. You will also participate in silicon debugging and support post-silicon validation efforts.
Required:
- Masters degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with a graduation date of Dec 2024 - May/June 2025
- Experience or interest in 3D NAND Flash and non-volatile memory
Its helpful if you meet one or more of the following qualifications, but it isn't a requirement.
- Strong fundamentals in circuit design, particularly analog/mixed-signal and digital
- Experience with HSPICE, FINESIM, VERILOG, System Verilog, and RTL design
- Proficiency in troubleshooting, problem-solving, and cross-functional teamwork
- Excellent communication (written and verbal) and interpersonal skills
- Eagerness to learn and adapt to new technologies and challenges
- Self-motivated, collaborative, innovative, and adaptable to a fast-paced environment
Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a persons gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the persons assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Know Your Rights: Workplace Discrimination is Illegal poster. Our pay transparency policy is available here.
Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.
Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.
Seniority level
- Seniority level Entry level
Senior Technologist high speed datapath & Circuit design engineer, VLSI Design Engineering

Posted today
Job Viewed
Job Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape.
Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.
Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.
**Job Description**
ESSENTIAL DUTIES AND RESPONSIBILITIES:
+ Architect and design circuits at transistor level and gate level for leading-edge 3D NAND flash memory, including page buffers, sense amplifiers and high-speed data path circuit design.
+ Perform block level and full chip circuit simulations to meet all performance specifications.
+ Conduct silicon debugging and evaluation with micro-probing.
+ Collaborate with characterization engineers to fully characterize silicon, and partner with other designers to develop solutions for silicon issues.
+ Generate detailed technical reports and presentations;
**Qualifications**
REQUIRED:
+ Requires MS degree in Electrical Engineering plus 15 years or more of relevant experience.
+ Experience developing datapath circuit designs for low power operating conditions
+ Working knowledge of device physics and process
PREFERRED:
+ Working knowledge of NAND Flash memory circuit design including Analog, Core, Datapath and IO circuits is preferred.
+ Working knowledge of NAND flash memory cell operation is preferred.
SKILLS:
+ The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment.
+ Self-motivated and self-directed, however, must have demonstrated ability to work well with people.
+ A proven desire to work as a team member, both on the same team and outside of the team.
+ Ability to troubleshoot and analyze complex problems.
+ Ability to multi-task and meet deadlines.
+ Excellent communication (written and verbal) and interpersonal skills.
**Additional Information**
Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the "Know Your Rights: Workplace Discrimination is Illegal ( " poster. Our pay transparency policy is available here ( .
Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.
Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.
Based on our experience, we anticipate that the application deadline will be **10/28/2025** (3 months from posting), although we reserve the right to close the application process sooner if we hire an applicant for this position before the application deadline. If we are not able to hire someone from this role before the application deadline, we will update this posting with a new anticipated application deadline.
#LI-KH1
**Compensation & Benefits Details**
+ An employee's pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs.
+ The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future.
+ You will be eligible to participate in Sandisk's Short-Term Incentive (STI) Plan, which provides incentive awards based on Company and individual performance. Depending on your role and your performance, you may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Sandisk's Standard Terms and Conditions for Restricted Stock Unit Awards.
+ We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program, employee stock purchase plan, and the Sandisk's Savings 401(k) Plan.
+ Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company's sole discretion, consistent with the law.
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Senior ASIC/VLSI Synthesis and Design Engineer
Posted today
Job Viewed
Job Description
Job Description
About Celestial AI
As Generative AI continues to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips. In the era of Accelerated Computing, data center bottlenecks are no longer limited to compute performance, but rather the system's interconnect bandwidth, memory bandwidth, and memory capacity. Celestial AI's Photonic Fabric™ is the next-generation interconnect technology that delivers a tenfold increase in performance and energy efficiency compared to competing solutions.
The Photonic Fabric™ is available to our customers in multiple technology offerings, including optical interface chiplets, optical interposers, and Optical Multi-chip Interconnect Bridges (OMIB). This allows customers to easily incorporate high bandwidth, low power, and low latency optical interfaces into their AI accelerators and GPUs. The technology is fully compatible with both protocol and physical layers, including standard 2.5D packaging processes. This seamless integration enables XPUs to utilize optical interconnects for both compute-to-compute and compute-to-memory fabrics, achieving bandwidths in the tens of terabits per second with nanosecond latencies.
This innovation empowers hyperscalers to enhance the efficiency and cost-effectiveness of AI processing by optimizing the XPUs required for training and inference, while significantly reducing the TCO2 impact. To bolster customer collaborations, Celestial AI is developing a Photonic Fabric ecosystem consisting of tier-1 partnerships that include custom silicon/ASIC design, system integrators, HBM memory, assembly, and packaging suppliers.
ABOUT THE ROLE
We are looking for a Senior ASIC/VLSI Synthesis and Design Engineer to drive the development of high-performance, low-power digital designs for cutting-edge ASICs and SoCs. This role involves optimizing power, performance, and area while ensuring timing closure, gate-level simulation, and post-silicon validation. You will collaborate with cross-functional teams to implement synthesis methodologies, constraint development, DFT integration, and power analysis.
If you have a strong background in ASIC/VLSI design, with deep expertise in synthesis, timing closure, DFT, and post-silicon debug, we want to hear from you.
ESSENTIAL DUTIES AND RESPONSIBILITIES
- Develop and implement synthesis flows for high-performance, low-power digital designs using industry-standard EDA tools (Genus, Tempus, DC, PrimeTime, Conformal LEC, etc.).
- Define and implement synthesis constraints at block and top levels, ensuring optimal timing closure and gate-level simulation.
- Optimize clock distribution, pipelining, and register balancing for maximum performance.
- Perform Logical Equivalency Checks at all design stages.
- Work closely with DFT teams to integrate scan chains, ATPG, and MBIST into the synthesis flow.
- Perform power analysis and optimization, applying techniques like power gating, clock gating, voltage scaling, and dynamic voltage frequency scaling.
- Debug and resolve timing, power, and area issues, ensuring efficient and scalable designs.
- Collaborate with physical design teams to ensure smooth handoff and timing closure through optimizations, analysis, physical synthesis and ECO implementation as needed.
- Lead design methodology improvements, driving efficiency in RTL-to-GDSII flows.
- Drive post-silicon validation and debug, ensuring successful production ramp-up.
QUALIFICATIONS
- Bachelor's degree with 8+ years of experience, or Master's degree with 6+ years of experience in Computer Science, Electrical Engineering, Information Technology or a related technical field.
- 8+ years of ASIC/VLSI design experience, focusing on synthesis and timing closure for large scale design in deep submicron technology.
- Expertise in Verilog/SystemVerilog RTL coding and constraint development for synthesis.
- Proficiency in synthesis tools from leading EDA vendors (Cadence, Synopsys, Mentor).
- Experience with gate-level simulation, static timing analysis (STA), and power-aware synthesis.
- Strong post-silicon debug and validation skills, including production bring-up and failure analysis.
- Proficiency in scripting languages (Tcl, Perl, Python) for automation and flow optimization.
- Strong problem-solving, debugging, and collaboration skills in a fast-paced environment.
LOCATION : Orange County, CA, or Santa Clara, CA
For California Location:
As an early stage start up, we offer an extremely attractive total compensation package inclusive of competitive base salary, bonus and a generous grant of our valuable early-stage equity. The target base salary for this role is approximately $185,000.00 - $225,000.00. The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by candidate in the interviews.
We offer great benefits (health, vision, dental and life insurance), collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high performance computing.
Celestial AI Inc. is proud to be an equal opportunity workplace and is an affirmative action employer.
#LI-Onsite
ASIC Design Engineer, Kuiper ASIC Design
Posted 26 days ago
Job Viewed
Job Description
Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.
Key job responsibilities
Gate Level Simulation: Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure.
Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers.
Develop Debug tools: RTL Emulation, silicon bring-up, and functional validation.
Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
Key job responsibilities
· Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets.
· Define, configure and integration SoC Subsystems
· Contribute to the SoC floor planning effort
· Define and develop any necessary support logic
· Configure, instantiate and integrate 3rd party IP blocks
· Understand low power design & the impact of DFT on the blocks
· Perform initial synthesis & timing analysis
· Assist verification team in unit verification including test plan development
· Assist with debug and bring-up
Basic Qualifications
- 3+ years of non-internship professional software development experience
- 3+ years of programming with at least one software programming language experience -
- 3+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing systems experience
- 3+ years of digital design experience, preferably in SoC design and implementation
Preferred Qualifications
- 2+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience
- Master's degree in computer science or equivalent
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.
Senior ASIC Design Engineer, Kuiper ASIC Design

Posted 4 days ago
Job Viewed
Job Description
Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.
Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
Key job responsibilities
Key job responsibilities
RTL Design and development of custom blocks.
Integration of large subsystems
Gate Level Simulation: Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure.
Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers.
Develop Debug tools: RTL Emulation, silicon bring-up, and functional validation.
In this role you will:
· Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets.
· Define, configure and integration SoC Subsystems
· Contribute to the SoC floor planning effort
· Define and develop any necessary support logic
· Configure, instantiate and integrate 3rd party IP blocks
· Understand low power design & the impact of DFT on the blocks
· Perform initial synthesis & timing analysis
· Assist verification team in unit verification including test plan development
· Assist with debug and bring-up
A day in the life
Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies.
Basic Qualifications
- 8+ years of non-internship professional software development experience
- 8+ years of programming with at least one software programming language experience -
- 8+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing systems experience
- 8+ years of digital design experience, preferably in SoC design and implementation
- Fixed point RTL design
- Filter design (FIR/IIR)
- DSP design
Preferred Qualifications
- 5+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience
- Modem wireless or OFDM experience
- Master's degree in computer science or equivalent
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.