436 Electrical Engineering jobs in Austin

Sr. Technical Product Manager, Physical Infrastructure (Electrical), Data Center Engineering Job ID: 2964923 | Amazon Data Services, Inc. AWS Infrastructure Services owns the design, planning, delivery, and operation of all AWS global infrastructure. In other words, we’re the people who keep the cloud running. We support all AWS data centers and all of the servers, storage, networking, power, and cooling equipment that ensure our customers have continual access to the innovation they rely on. We work on the most challenging problems, with thousands of variables impacting the supply chain — and we’re looking for talented people who want to help. You’ll join a diverse team of software, hardware, and network engineers, supply chain specialists, security experts, operations managers, and other vital roles. You’ll collaborate with people across AWS to help us deliver the highest standards for safety and security while providing seemingly infinite capacity at the lowest possible cost for our customers. And you’ll experience an inclusive culture that welcomes bold ideas and empowers you to own them to completion. The Sr. Technical Product Manager (Sr. PM-T) creates and drives the newest generations of data center electrical products and electrical distribution infrastructure technologies from concept to at-scale global implementation. This role provides a unique opportunity to engage with advanced infrastructure solutions and the exceptional people that develop them. The Sr. PM-T applies their expertise to: Engage with internal and external Amazon customers and support teams to gain insights and capture critical electrical and power needs for the business today and in the future. Utilize those insights to identify specific product requirements, create a product vision, and own the product development roadmap for critical segments of the data center electrical infrastructure. Coordinate between multiple teams to develop compelling business cases to substantiate business value, define product prioritization, and outline budget and resources required to implement product roadmaps. Drive continuous advancements and improvements within our data center electrical designs, and communicate technical direction to Sr. Management. Own and drive the complete product lifecycle from idea conception through implementation and wide scale deployment to eventual deprecation. Develop product features and deployment strategies to improve profitability and penetration in new applications and use cases. Work independently in a high-pressure environment with all levels of leadership and exercise sound judgment where clear guidelines may not exist. Amazon's vision is to be the world's most customer-centric company, and this role is key to that vision. These technologies are essential for meeting our customers’ expectations for service and value and meeting Amazon’s goals for efficiency, speed, and reliability as we continue expanding our data centers at hyper-scale speed. We are a smart team of doers who work passionately to apply advances in data center technology. We will rely on your ability to understand the customers' needs and build them into the overall product design and develop the strategy. You should be comfortable collaborating in a fast-paced and often uncertain environment, and contributing to innovative solutions, while demonstrating leadership, technical competence, and a bias for action. The impact of the changes is broad, so you will need to think big as you set the direction for the team. As an ideal candidate, you: Are passionate about understanding customers’ needs. Have passion for product development, infrastructure design, and low voltage products. Are great at solving problems. Have the ability to lead multiple products/projects at different stages while staying organized. Earn trust and relationships with different stakeholders (e.g., Engineering, Product Development, Finance, Operations). Are comfortable addressing and resolving ambiguity. Recognize and appreciate diversity of thought and perspectives. Each day you will interact with different teams responsible for engineering, product development, finance, integration, and operation of these complex technology programs. You prioritize your activities to support data center product development, identify and resolve problems and blockers, and focus on the actions that are most impactful for product success. We have an immediate opening for a Sr. Technical Product Manager in Northern Virginia, Seattle, Austin, and Columbus. If you meet these qualifications, exude passion, and enjoy the challenge of innovative projects at hyper-scale size, this job is for you! Key job responsibilities Product manage and own the roadmap for low voltage distribution products designed for Amazon datacenters. Engage with internal and external Amazon customers and support teams to gain insights and capture critical electrical and power needs for the business today and in the future. Utilize those insights to identify specific product requirements, create a product vision, and own the product development roadmap for critical segments of the data center electrical infrastructure. Coordinate between multiple teams to develop compelling business cases to substantiate business value, define product prioritization, and outline budget and resources required to implement product roadmaps. Drive continuous advancements and improvements within our data center electrical designs, and communicate technical direction to Sr. Management. Own and drive the complete product lifecycle from idea conception through implementation and wide scale deployment to eventual deprecation. Develop product features and deployment strategies to improve profitability and penetration in new applications and use cases. Work independently in a high-pressure environment with all levels of leadership and exercise sound judgment where clear guidelines may not exist. BASIC QUALIFICATIONS - 5+ years of technical product or program management experience - 5+ years relevant work experience in or working with mission critical facilities - 5+ years of product development or similar experience in electrical hardware sub-systems for data centers or other mission critical facilities - 5+ years experience with one or more of the following electrical equipment types: Low Voltage Switchgear/ Switchboards, Power Distribution Cabinets/Units (PDC/PDU), Remote Power Panels (RPP), Busduct and Tap-Off Boxes, and/or Electrical Controls - Bachelor's degree in Electrical Engineering or similar field from an accredited university PREFERRED QUALIFICATIONS - 7+ years in product, program, and/or technical leadership for large scale strategic initiatives in the data center infrastructure domain - Master's degree in Electrical Engineering and/or MBA or similar field from an accredited university - Experience writing documents on business requirements for new products, product development proposals, process improvement initiatives and/or product roadmaps - Experience in Contract Manufacturing, especially launching and scaling production of electrical products - Advanced understanding of global electrical codes - Financial modeling and P&L development for products Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit this link for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $136,100/year in our lowest geographic market up to $235,200/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit this link . This position will remain posted until filled. Applicants should apply via our internal or external career site. Important FAQs for current Government employees Before proceeding, please review the following FAQs here . Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. #J-18808-Ljbffr

Summary:

Meta is seeking a versatile Hardware Engineer to join our Compute Hardware team. Our mission is backed by a massive hardware infrastructure. Our computational challenges are big, complex, and consistently evolving. Your work has the potential to shape the compute hardware going into our cutting-edge data centers affecting billions of users.

Required Skills:

Hardware Engineer Responsibilities:

1. Work with local and remote teams and suppliers, to define product roadmap and program

2. Specify, design, and develop CPU/GPU/ASIC based compute hardware solutions, and ASIC enabling hardware

3. Lead the bring-up, validation, and launch of hardware systems

4. Support hyper-scale deployment and obtain learning for next generation design

5. Collaborate with open source hardware community to drive innovation for large scale infrastructure

Minimum Qualifications:

Minimum Qualifications:

1. Bachelor's degree in Electrical Engineering, Computer Engineering, relevant technical field, or equivalent practical experience

2. 6+ years of experience with development and bring-up of data center system equipment, or complex consumer devices

3. 6+ years of experience with PCB design with both integrated and discrete circuits, and high-speed interfaces

4. 6+ years of experience leveraging hardware architecture and design for analyzing and resolving system hardware issues

Preferred Qualifications:

Preferred Qualifications:

1. 6+ years of experience with designing ASIC verification & bring up hardware

2. 6+ years of experience with end-to-end enabling, design, and deployment cycle of multiple generations of products

3. Experience with industry standard EDA tools for developing and reviewing PCB designs

4. 6+ years of expertise with the industry leading designs of CPU/GPU hardware and server system architecture

5. Master's degree in Electrical Engineering, Computer Engineering, or relevant technical field

6. Experience interfacing with thermal, mechanical, management firmware, system firmware, and software teams during product development

7. Experience with owning and delivering a complete hardware enclosure as technical lead with other cross-functional teams

8. 6+ years of expertise with designing and troubleshooting data buses used in servers (PCIe, CXL, DDR, SAS, SATA, I2C) in Linux environments, including the use of high-speed scope, logic analyzer, and other validation methods

Public Compensation:

$139,000/year to $200,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at

Summary:

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a team working with the best in the industry, focused on developing cutting-edge ASIC solutions for Meta's data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will be using other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.

Required Skills:

ASIC Engineer, Design Verification Responsibilities:

1. Define and implement block/IP/System on Chip (SoC) verification plans, build verification test benches to enable block/IP/sub-system/SoC level verification

2. Develop functional tests based on verification test plan

3. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage

4. Debug, root-cause and resolve functional failures in the design, partnering with the Design team

5. Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality

Minimum Qualifications:

Minimum Qualifications:

1. Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta

2. 3+ years of hands-on experience in SystemVerilog/UVM methodology or C/C++ based verification

3. 3+ years experience in block/IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies

4. Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments

5. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

Preferred Qualifications:

Preferred Qualifications:

1. Track record of 'first-pass success' in Application-Specific Integrated Circuit (ASIC) development cycles

2. Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle

3. Experience in development of Universal Verification Methodology (UVM) based verification environments from scratch

4. Experience with Design verification of Data-center applications like Video, Artificial Intelligence/Machine Learning (AI/ML) and Networking designs

5. Experience with revision control systems like Mercurial(Hg), Git or SVN

6. Experience with verification of Advanced RISC Machines/Reduced Instruction Set Computing Five (ARM/RISC-V) based sub-systems or System-on-Chip (SoCs)

7. Experience with IP or integration verification of high-speed interfaces like Peripheral Component Interconnect Express (PCIe), Double Data Rate (DDR), Ethernet

Public Compensation:

$114,000/year to $166,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at

Summary:

Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip (SoC) and IP for data center applications.

Required Skills:

ASIC Implementation Engineer - Synthesis Responsibilities:

1. Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power

2. Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them

3. Perform Power Estimation at RTL and Gate Level and identify power reduction opportunities

4. Run Formal Verification checks between RTL and Gate level netlist and debug the aborts, inconclusive and Logic Equivalency failures

5. Perform RTL Lint and work with the Designers to create waivers

6. Perform RTL DFT Analysis and improve the DFT coverage for Stuck-at faults

7. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top-level including SOC. Analyze the inter-block timing and come up with IO budgets for the various partition blocks

8. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis, STA, Power)

9. Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback

Minimum Qualifications:

Minimum Qualifications:

1. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

2. 8+ Years of experience as a Front End Synthesis & Integration Engineer

3. Experience with RTL Synthesis and design optimization for Power, Performance, Area

4. Knowledge of front-end and back-end ASIC tools

5. Experience with RTL design using SystemVerilog or other HDL

6. Experience managing multiple design releases and working with cross functional teams to support and debug timing, area, power issues

7. Experience with communicating across functional internal teams and vendors

Preferred Qualifications:

Preferred Qualifications:

1. Experience in SOC Design Integration and Front-End Implementation

2. Knowledge of Physical Design flow such as Floorplanning, CTS, Routing

3. Understanding of Timing/physical libraries, SRAM Memories

4. Knowledge of STA signoff and understanding of AOCV, POCV

5. Experience with low power techniques for reducing power

6. Experience with EDA tools and scripting languages (Python, TCL) used to build tools and flows

7. Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools

Public Compensation:

$173,000/year to $249,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at

Summary:

Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video transcoding and network acceleration.

Required Skills:

ASIC Engineer, Design Responsibilities:

1. Architecture exploration

2. Micro-architecture development

3. Soft and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test plan development and debug

4. Collaboration with implementation team to close the design on timing and power

Minimum Qualifications:

Minimum Qualifications:

1. Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta

2. 2+ years of experience in micro-architecture and RTL development for complex control and data path IPs OR Experience in SoC Micro-architecture, Design and Integration

3. RTL development using Verilog, System Verilog and HLS

Preferred Qualifications:

Preferred Qualifications:

1. Experience in CPU, NOC, Memory and Peripheral Subsystems

2. Experience with Synthesis, Timing Closure and Formal Verification Methodology

3. Master's or PhD degree in Electrical Engineering, Computer Science or related areas

4. Experience in data path development

Public Compensation:

$114,000/year to $166,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at

CPU Full Chip Physical Integration Engineer

Austin, Texas, United States

Hardware

Summary

Posted: Jul 23, 2025

Role Number: 200613761

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!

In this highly visible role, you will be at the center of a processor design effort interfacing with all disciplines, with a critical impact on getting functional products to millions of customers quickly.

Description

As a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development.

• Full chip floorplan, area optimizations, block partitioning and pin placements • Own chip level place and route (PnR), final CPU layout database construction and verification (PDV) • Develop and validate Power Grid, including routability analysis • Drive custom layout integration, block and full-chip level EM/IR, electrical verification/analysis as well as formal verification • Work with the implementation/CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with the SOC team to meet IP technical and delivery requirements • Participate in establishing CAD and physical design methodologies and flow development for chip integration and analysis • Scripting to automate tasks and improve debug efficiency

Minimum Qualifications

• Minimum BS and 10+ years of relevant industry experience

• Experience with scripting in Perl or TCL

Preferred Qualifications

• Knowledge of industrial standards and practices in Physical Design, including Floorplanning, Partitioning, Budgeting, Place and Route and Physical Verification

• Experience in developing and implementing Power Grid and Clock specifications

• Solid knowledge of Low Power Design, Physical Construction, Integration, EMIR (Drop/Noise), SIGEM Analysis, Formal Verification, Physical PDV, DRC/LVS Verification, and DFM

• Solid understanding of verification tools such as Conformal LP, LEC, RedHawk, Calibre

• Solid understanding of CMOS circuit design. Layout design background is a plus

• Working knowledge of Extraction and STA methodology and tools

• Working knowledge of Computer Architecture

• Ability to work well in a team, being an excellent problem solver, and self motivated

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .

Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.

Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program ( .

Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .

Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you’re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

• Review and analyze project plans, specifications, and other documentation to understand project requirements.
• Conduct quantity take-offs and prepare detailed cost estimates for labor, materials, equipment, and subcontractor services.
• Solicit and analyze subcontractor and supplier quotes to ensure competitive pricing.
• Collaborate with project managers, architects, and other team members to identify value engineering opportunities.
• Prepare and present comprehensive and accurate bid proposals to clients.
• Attend pre-bid meetings and site visits as necessary, previous experience with electrical construction needed!
• Stay informed about market trends, pricing, and industry best practices.
• Maintain a thorough understanding of project schedules and deadlines.

• Bachelor's degree in Construction Management, Engineering, or a related field (Preferred)
• Experience as an electrical construction estimator, with a track record of successfully bidding and winning projects with ideally 7-10yrs of estimating experience.
• Strong knowledge of electrical and commercial construction processes, materials, and methods.
• Proficiency in construction estimating software and Microsoft Office Suite.
• Excellent analytical and mathematical skills.
• Strong attention to detail and accuracy.
• Effective communication and interpersonal skills.
• Ability to work independently and collaboratively in a team environment.
• Familiarity with local building codes and regulations a plus but open to relocators as well.

• Competitive compensation package based on experience with benefits and bonus potential along with great work / life balance
• Positive company culture Large commercial project portfolio with great area clients, many are repeat
• Positive / communicative work environment with great team support, many with long tenures and company prefers internal growth/promotion

• Leading a team of junior and senior design engineers in development of ARM Neoverse Compute Subsystem (ARM CSS)
• Applying modern design processes and flows using ARM based design flows and integration tools.
• Partitioning and architecting designs from requirements, including high-level and microarchitecture.
• Collaborating with cross-functional teams, including verification, DFT, and physical design.
• Implementing industry-standard design methods for clocking, resets, metastability, and logical design for control/data paths.
• Developing and reviewing System Verilog RTL code for complex designs.

• Driving the successful execution of full turnkey SoC designs from specification to parts.
• Ensuring the delivery of high-quality, high-performance ASIC and FPGA devices.
• Enabling our customers to develop cutting-edge products for high-performance computing, automotive, aerospace & defense, and more.
• Contributing to the continuous innovation and advancement of our design methodologies and tools.
• Enhancing the capabilities and expertise of your team through leadership and mentorship.
• Supporting the strategic goals of Synopsys with your technical expertise and innovative solutions.

• Bachelor's Degree in Electrical or Computer Engineering.
• 12+ years of experience designing and verifying ASIC/FPGA devices.
• Experience with ARM CSS ecosystem and the Fast Forward Initiative.
• Experience in the following areas: CMN, NIC, GIC and Neoverse Processors.
• Experience with vendor tooling within an ASIC development flow (Simulators, LINT, CDC/RDC, Synthesis, STA and Socrates).
• Ability to understand and implement complex protocols such as PCIe/CXL, DDR, UCIe.

Firmware Engineer - Senior
Austin, TX 78728
12 Months

The Role:
Client's Enterprise team is currently looking for engineers who are passionate about Server products and would like to be part of our EPYC journey to greatly impact the x86 server market. Our team is dedicated to developing and deploying cutting edge technologies, such as our advanced chiplet design, the latest silicon process technologies, and our streamlined IO architecture, to create the groundbreaking products that solve tomorrow's challenges in today's data driven world. We are hiring engineers interested in developing Platform bios solutions using Client's EDK2 codebase, future platform bios architecture and maintain existing product execution stream. Strong candidates will have server firmware experience in the arena of EDKII BIOS, will apply well-honed debug methodologies to solve complex issues, and will collaborate with internal design teams as well as other firmware organizations on solutions.

The Person:
A successful candidate will employ proven software methodologies, firmware design expertise, deep technical knowledge, strong customer communication, and well-honed organizational skills across multiple teams to ensure on-schedule, defect-free customer BIOS solutions. This will involve providing technical leadership and mentorship as the external face of Client's firmware design team, while internally proactively managing issues and risks.
To be successful you must possess the technical proficiency and interpersonal confidence to technically clearly represent design ideas, sophisticated problem descriptions, and innovative solutions with other developers as well as customer teams.

Preferred Experience:
• 2+ years experience in BIOS, firmware, or system software development with proven knowledge of x86 system architecture
• C and ASM programming experience mandatory
• Python and groovy experience desired.
• Knowledge of server hardware interfaces (10G/1G Ethernet, SATA, AHCI, DDR3, PCIe Gen1/Gen2/Gen3, SPI, I2C) encouraged
• Intimate knowledge of software development process methodology expected
• Knowledge of industry-standard initiatives such as (ACPI, SMBIOS, PCIe) expected
• Experience with Git, Github, Jenkins.
• Strong analytical skills and debug methodology encouraged

Education:
• BSEE, BSCS, or BSCE degree or higher with 2+ years experience in firmware development
• Candidates should enjoy working in a dynamic team environment