9,211 Fpga Design jobs in the United States

RELOCATION ASSISTANCE: Relocation assistance may be available
CLEARANCE TYPE: Secret
TRAVEL: Yes, 10% of the Time
**Description**
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.
The Navigation, Targeting, and Survivability Division (NTS), located in the Northwest Chicago suburbs, develops operational Electronic Warfare (EW) and targeting systems that provide situational awareness, self-protection, and offensive electronic attack capability to platforms across the spectrum from visible light IR to millimeter wave RF. By joining us, you'll work on projects that help safeguard our nation related to land forces, rotary wing survivability systems, international and U.S. military electronic warfare systems, communications systems, missile warning systems and sensors, infrared counter-measure systems (IRCM), automatic test equipment, modeling and simulation, and situational awareness programs.
The FPGA/Principal FPGA Design Engineer role involves full life-cycle product development from system concept and requirements through design, implementation, test verification, production, field support while working in integrated product teams spanning Engineering, Manufacturing, and Program Management. Digital subsystem and circuit card designs utilize the latest FPGA technologies from all major vendors and device families including Xilinx, Altera, and Actel, and support high speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and interfaces.
Job Description:
As a FPGA/Principal FPGA Design Engineer, you will join our diverse team and be responsible for research, design, and development of digital hardware products. Your expertise in digital component design and analysis, modeling and simulation, circuit level design and test, and project leadership are desired for this position. Researches, design, develops, and tests a variety of electronic equipment and systems, including radar and radiation detection equipment; radio, television and other communications equipment and systems; circuitry components; analog and digital computers; and control and test equipment.
*This position may be filled at either FPGA Design or Principal FPGA Design Engineer level based on the qualifications listed below. *
This position will be full-time and on-site at our Rolling Meadows, IL. location.
**Basic Qualifications for an FPGA Design** **Engineer:**
- Bachelors' degree in a STEM field (Science, Technology, Engineering or Math) with a minimum 2 years of digital electronics design experience or a Master's degree in a STEM field.
- Digital circuit design experience, including simulation & schematic capture through test and integration
- Prior hands-on prototyping and debug experience testing complex digital subsystems, such as complex circuit card development involving FPGAs, and/or embedded processors, and/or high-speed interfaces.
- Demonstrated ability to lead projects with 2 or less team members.
- Demonstrated ability to translate system performance and operational specifications into hardware requirements, design, and test specifications.
- Familiarity with documentation revision control and review systems similar to DOORS, ClearCase, and ClearQuest.
- US Citizenship
- Must have interim secret clearance prior to starting. Once started, must have the ability to obtain and maintain a Secret security clearance.
**Basic Qualifications for a Principal FPGA Design Engineer:**
**-** Bachelors' degree in a STEM field (Science, Engineering, Technology or Math) with a minimum of 5 years of digital electronics design experience or 3 years of digital electronics design experience with a Master's degree in a STEM field.
- Extensive digital circuit design experience, including simulation & schematic capture through test and integration.
- Extensive hands-on prototyping and debug experience testing complex digital subsystems, such as complex circuit card development involving FPGAs, and/or embedded processors, and/or high-speed interfaces
- Demonstrated ability to lead projects with 2 or more team members.
- Demonstrated ability to translate system performance and operational specifications into hardware requirements, design, and test specifications.
- Familiarity with documentation, revision control and review systems similar to DOORS, ClearCase, and ClearQuest.
- US Citizenship
- Must have interim secret clearance prior to starting. Once started, must have the ability to obtain and maintain a Secret security clearance.
**Preferred Qualifications:**
**-** Advanced degree in Electrical or Computer Engineering with a minimum of 5 years of digital electronics design experience.
- Working knowledge of Electronic Warfare systems.
- Experience in Aerospace and/or Defense industries.
- Recent circuit card design experience utilizing circuit-related tools including Cadence Concept, Allegro, and/or Mentor DxDesigner, Expedition.
- Working experience with ClearCase/ClearQuest and DOORS Current Secret or Top-Secret Security Clearance.
- Proven skills to include team leadership, mentoring others, communicating with all levels of an organization internally and externally, being adaptable, creative, collaborative and comfortable working independently and enjoys solving difficult problems
Primary Level Salary Range: $93,900.00 - $40,900.00
Secondary Level Salary Range: 115,800.00 - 173,800.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

**Description:** Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on space-based mission processing capabilities at the edge. This position will help our team evolve mission processing applications of remote sensing payloads onto flight hardware for onboard mission processing operations. In this role, the FPGA Design Engineer will be responsible for leveraging the Vivado Design Suite and hardware design languages VHDL and Verilog to deploy processing code and algorithms onto flight hardware. This position will work alongside research scientists, software engineers, and other FPGA engineers on the APEX (Advanced Programs and Exploitation) team.
The selected candidate will be expected to:
- develop an understanding of mission processing code written in C++ and implement for hardware processing.
- develop, integrate, and test of processor subsystem features and interfaces in FPGA hardware.
- generate requirements, create FPGA code, and test bench development.
Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
This position is in beautiful Boulder, Colorado at our offices which have a collaborative and modern agile workspace.
**Basic Qualifications:**
- Bachelor of Science or higher from an accredited college in Electrical Engineering, Computer Engineering or related discipline, or equivalent experience/combined education.
- Ability to obtain a TS/SCI Clearance required for this role.
- Understanding of HDL Languages (VHDL & Verilog)
- Experience designing with Vivado
**Desired Skills:**
- Proficient in Matlab & C++
- Digital logic design experience.
- Experience interfacing FPGAs with processors.
- Experience with Vitis Model Composer.
- Experience with Matlab HDL Coder
- Familiarity with Xilinx platforms and tools.
- Knowledge of FPGA concepts like clock domains, memory hierarchies, and routing.
- Demonstrated experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
- Knowledge of space-grade/qualified FPGAs and ASICs.
**Security Clearance Statement:** This position requires a government security clearance, you must be a US Citizen for consideration.
**Clearance Level:** TS/SCI
**Other Important Information You Should Know**
**Expression of Interest:** By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.
**Ability to Work Remotely:** Part-time Remote Telework: The employee selected for this position will work part of their work schedule remotely and part of their work schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process.
**Work Schedules:** Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits.
**Schedule for this Position:** 4x10 hour day, 3 days off per week
**Pay Rate:** The annual base salary range for this position in California and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $76,500 - $134,895. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer. **Benefits offered:** Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays. (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year. This position is incentive plan eligible.
**Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.**
**The application window will close in 90 days; applicants are encouraged to apply within 5 - 30 days of the requisition posting date in order to receive optimal consideration.**
At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world's most complex challenges. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work.
With our employees as our priority, we provide diverse career opportunities designed to propel, develop, and boost agility. Our flexible schedules, competitive pay, and comprehensive benefits enable our employees to live a healthy, fulfilling life at and outside of work. We place an emphasis on empowering our employees by fostering an inclusive environment built upon integrity and corporate responsibility.
If this sounds like a culture you connect with, you're invited to apply for this role. Or, if you are unsure whether your experience aligns with the requirements of this position, we encourage you to search on Lockheed Martin Jobs , and apply for roles that align with your qualifications.
**Experience Level:** Experienced Professional
**Business Unit:** SPACE
**Relocation Available:** Possible
**Career Area:** Software Engineering
**Type:** Full-Time
**Shift:** First

**THE COMPANY**
**Silvus Technologies** is dedicated to one mission: connecting those who keep us safe. We do so by delivering the most advanced Mobile Ad-hoc Network (MANET) radios powered by our custom and ever-evolving Mobile-Networked MIMO waveform. Together, our radios and waveform provide the vital communications for mission critical applications in the harshest environments from underground tunnels to high altitude balloons.
Silvus StreamCaster® radios are being rapidly adopted by customers all over the world ranging from the U.S Departments of Defense, to International, Federal, State and Local Law Enforcement agencies, all the way to the Super Bowl, Grammys and industry-leading drone, robot, and other unmanned systems manufacturers.
_Wouldn't you like to join an incredibly talented group of people, doing very challenging work, with the prime directive of "_ Keeping Our Heroes Connected ( _"?_
Silvus' rapid growth is fueled by a focus on research and innovation and a team of the most passionate, skilled, and creative thinking individuals. _If you are looking for a challenging experience, you owe it to yourself to learn how Silvus can provide a rewarding opportunity that creates a pathway to a fulfilling career._
THE OPPORTUNITY
Silvus is seeking a full-time **_FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA Engineering_ team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects targeted to address challenging real-world communication needs.
The _FPGA Design Engineer_ will be based at Silvus headquarters in the heart of vibrant **West Los Angeles,** **CA** and is on a hybrid schedule, a minimum of 3 days onsite per week is expected. On-site days are Mondays, Wednesdays, and Thursdays.
The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion.
ROLE AND RESPONSIBILITIES
+ Digital design architecting for wireless communication projects.
+ Fixed point design of signal processing blocks while working with systems engineers.
+ RTL coding, simulation, and test bench development.
+ FPGA synthesis and timing closure.
+ Hardware verification and troubleshooting; familiarity with logic analyzers.
+ Provide support to the RF and Software Engineering Teams.
REQUIRED QUALIFICATIONS
+ Bachelor of Science degree in Electrical Engineering, Computer Science, or relevant field.
+ Minimum 2 years of demonstrated experience in FPGA design.
+ Proven experience with multiple clock-domain, high-utilization FPGA designs.
+ Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
+ Experience with tcl or python.
PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES
+ Master of Science degree in Electrical Engineering (MSEE).
+ Demonstrated experience with fixed point binary arithmetic, and digital signal processing designs.
+ Basic MATLAB skill.
+ Experience with communication systems on FPGA or ASIC designs.
**COMPENSATION**
_The pay range is NOT a guarantee. It is based on market research and peer data, and will vary depending on the candidate's experience and qualifications._
CA Pay Range
$95,000-$135,000 USD
**NOTE - As a U.S. Federal Contractor, Silvus Technologies requires that ALL candidates being considered for employment for any position (regardless of level) MUST be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen ONLY requirements are needed for some Engineering or R&D roles. This generally does NOT apply to International positions; only job postings for positions located in the U.S. Exceptions will be included in the Required Qualifications section of the posted position.**
**_All Employment is contingent upon the successful clearance of a background check._**
Silvus is proud to be an equal-opportunity employer, and we value diversity. We do not discriminate on the basis of race, color, age, religion or belief, ancestry, national origin, sex (including pregnancy), sexual orientation, gender identity and/or expression, marital, civil union or domestic partnership status, physical or mental disability, protected veteran status, genetic information, political affiliation, or any other factor protected by applicable federal, state, or local laws.
We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive benefits and privileges of employment. Please contact us to request accommodation.
_*Silvus does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to Silvus Technologies._

Description
Seeking a highly skilled FPGA Engineer with deep expertise in ARM processor integration to join our engineering team in Chatsworth, CA. This role is ideal for an experienced engineer passionate about designing and implementing high-performance, ruggedized embedded systems for aerospace, defense, and industrial applications.
___
Key Responsibilities
- FPGA Architecture & Design
- Lead the design and development of FPGA-based subsystems using VHDL/Verilog for high-reliability embedded platforms.
- Architect scalable and modular FPGA designs for real-time processing, signal acquisition, and control systems.
- ARM Processor Integration
- Integrate ARM Cortex-A/R/M processors with FPGA logic for heterogeneous computing platforms.
- Develop and optimize AXI interfaces, memory controllers, and peripheral bridges between ARM cores and FPGA fabric.
- System-Level Development
- Collaborate with hardware, software, and systems engineers to define requirements and implement FPGA solutions that meet MIL-STD and DO-254 compliance.
- Support board-level bring-up, debug, and validation of FPGA designs in conjunction with ARM-based SoCs.
- Verification & Simulation
- Create comprehensive testbenches and perform functional simulations using ModelSim, Vivado, or equivalent tools.
- Conduct timing analysis, constraint development, and formal verification to ensure robust performance under extreme conditions.
- Documentation & Compliance
- Generate detailed design documentation, including schematics, timing reports, and verification plans.
- Ensure all designs meet Aitech's ruggedization standards and industry certifications for aerospace and defense.
Skills
FPGA, Design, Electrical engineering, ARM Processor, Vhdl, Verilog, Xilinx, mil stds, Embedded Linux, Ethernet, i2c, rtos
Top Skills Details
FPGA, Design, Electrical engineering , ARM Processor,Vhdl, Verilog, Xilinx, mil stds
Additional Skills & Qualifications
Required Qualifications
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- 5-10 years of experience in FPGA development, preferably in aerospace or defense environments.
- Proficiency in VHDL/Verilog, Xilinx Vivado, and ARM processor architecture.
- Experience with high-speed interfaces (PCIe, Ethernet, DDR, UART, SPI, I2C).
- Familiarity with embedded Linux or RTOS environments on ARM platforms.
- Strong understanding of signal integrity, power management, and EMI/EMC considerations.
___
Preferred Skills
- Experience with Xilinx Zynq Ultrascale+ or similar SoC-FPGA platforms.
- Knowledge of DO-254, MIL-STD-810, and other ruggedization standards.
- Background in radiation-tolerant or space-grade FPGA design.
- Experience with Git, Jira, and collaborative development workflows.
Experience Level
Expert Level
Pay and Benefits
The pay range for this position is $ - $ /hr.
Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following:
- Medical, dental & vision - Critical Illness, Accident, and Hospital - 401(k) Retirement Plan - Pre-tax and Roth post-tax contributions available - Life Insurance (Voluntary Life & AD&D for the employee and dependents) - Short and long-term disability - Health Spending Account (HSA) - Transportation benefits - Employee Assistance Program - Time Off/Leave (PTO, Vacation or Sick Leave)
Workplace Type
This is a fully onsite position in Chatsworth,CA.
Application Deadline
This position is anticipated to close on Oct 14, 2025.
About Actalent
Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 30,000 consultants and more than 4,500 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500.
The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.
If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing due to a disability, please email (% ) for other accommodation options.

**Job Description**
At Boeing, we innovate and collaborate to make the world a better place. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.
Boeing Defense, Space & Security (BDS) seeks a **Senior** **FPGA Design Engineer** to join our team in Huntsville, AL to develop, debug, and integrate processor subsystem features and interfaces in FPGA hardware for Advanced Processors. You will be working on cutting-edge technologies, supporting various domain areas such as **flight command and control** , **air traffic control** , and **homeland defense** .
**Position Responsibilities** :
+ Develop **FPGA requirements** , **FPGA code** of logic design. Generate self-checking test bench, unit test, synthesis, timing analysis, Built-In-Test ( **BIT** ) and support of debug and system integration activities.
+ Develop, debug, and integrate processor subsystem features and interfaces in FPGA hardware for advanced processors.
+ Develop **high-speed serial interferences** inside an FPGA. (SERDES)
+ Collaborate with cross-functional teams including other engineering disciplines.
+ Stay current on industry best practices and technological advancements in FPGA design and **Digital Signal Processing** .
This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim or final U.S. Secret clearance post-start is required.
**Basic Qualifications (Required Skills/Experience)** :
+ 5+ years of experience using **FPGA** design tools (such as: Modelsim, **Xilinx Vivado** or ISE, Altera Quartus, Microsemi, or similar).
+ 5+ years of experience do you have with Hardware Description Language ( **HDL** ) code development.
+ Bachelor of Science degree from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), chemistry, physics, mathematics, data science, or computer science.
**Preferred Qualifications (Desired Skills/Experience)** :
+ **MSEE** , **MSCE** experience.
+ Experience with **Verilog** , **C/C++** , **MATLAB** / **Simulink** , .
+ Synopsis Synplify, Synopsis VCS, NCSim, ChipScope tool sets.
+ Experience with **Xilinx** /AMD and MicroSemi/Microchip part families internal FPGA fabric and IP.
+ FPGA design experience with tools noted above.
+ Previous experience related to aerospace design techniques.
+ Experience with management of Configuration Control ( **GitLab** preferred).
+ Experience with **Vivado** and **Vitis** FPGA toolsets.
+ Experience with **UVM** .
+ Experience working with **Versal** FPGAs.
+ Experience with troubleshooting and debugging with board-level testing and FPGA validation.
+ Experience in **FPGA life cycle** (architecture, design, simulation, verification, validation, integration & test).
**Typical Education & Experience:**
Level 4: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g. Bachelor) and typically 9 or more years' related work experience or an equivalent combination of technical education and experience or non-US equivalent qualifications. In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
Level 5: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g. Bachelor) and typically 14 or more years' related work experience or an equivalent combination of technical education and experience or non-US equivalent qualifications. In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
Level 6: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g. Bachelor) and typically 20 or more years' related work experience or an equivalent combination of technical education and experience or non-US equivalent qualifications. In the USA, ABET accreditation is the preferred, although not required, accreditation standard.
**Drug Free Workplace** :
Boeing is a Drug Free Workplace (DFW) where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies.
**Relocation** :
This position offers relocation based on candidate eligibility.
**Pay & Benefits** :
At Boeing, we strive to deliver a Total Rewards package that will attract, engage and retain the top talent. Elements of the Total Rewards package include competitive base pay and variable compensation opportunities.
The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work.
The specific programs and options available to any given employee may vary depending on eligibility factors such as geographic location, date of hire, and the applicability of collective bargaining agreements.
Pay is based upon candidate experience and qualifications, as well as market and business considerations.
Summary Pay Range:
Level 4: $119,850 - 162,150
Level 5: $43,650 - 194,350
Level 6: 170,00 - 230,000
Applications for this position will be accepted until **Oct. 16, 2025**
**Export Control Requirements:** This position must meet export control compliance requirements. To meet export control compliance requirements, a "U.S. Person" as defined by 22 C.F.R. §120.15 is required. "U.S. Person" includes U.S. Citizen, lawful permanent resident, refugee, or asylee.
**Export Control Details:** US based job, US Person required
**Education**
Bachelor's Degree or Equivalent Required
**Relocation**
This position offers relocation based on candidate eligibility.
**Security Clearance**
This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim and/or final U.S. Secret Clearance Post-Start is required.
**Visa Sponsorship**
Employer will not sponsor applicants for employment visa status.
**Shift**
This position is for 1st shift
**Equal Opportunity Employer:**
Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law.
Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law.

Job Description
Overview:
Insight Global is seeking multiple FPGA Design Engineers to join one of our largest federal clients. This person will be joining a core engineering team developing FPGA solutions for defense systems. You'll design and debug FPGA architectures using protocols like Ethernet, I2C, SPI, and AXI, contributing to secure, high-performance communication products.
Key Responsibilities:
Design and implement FPGA architectures from system requirements
Develop RTL code (VHDL), run simulations, and perform timing analysis
Use advanced EDA tools (e.g., Vivado, Questa, Synplify) for design and verification
Conduct board bring-up and hardware/software integration
Support NSA certification efforts
Tools & Technologies:
Mentor Questa, UVM, CDC/RDC analysis, Synopsys tools
Xilinx, Intel, and Microchip FPGA platforms
Mature design processes across multiple vendors
We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy: and Requirements
-Bachelor of Science (BS) Four year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)
-5-20 years of experience as a FPGA/Hardware Design Engineer
-Ethernet experience - Designing with Ethernet protocols
-Experience with Xilinx FPGAs and/or Vivado
Experience implementing design in RTL (VHDL) and performing module level simulations Nice to Have Skills:
Experience with mapping algorithms to architecture
Experience in C++ (OOP)
Experience with any of protocols : Ethernet, TCP/IP, PCIe, NVMe, USB
Experience with Xilinx SoC design with SDKs and PetaLinux OS
Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult

As a community, the University of Rochester is defined by a deep commitment to Meliora - Ever Better. Embedded in that ideal are the values we share: equity, leadership, integrity, openness, respect, and accountability. Together, we will set the highest standards for how we treat each other to ensure our community is welcoming to all and is a place where all can thrive.
**Job Location (Full Address):**
250 East River Rd, Rochester, New York, United States of America, 14623
**Opening:**
Worker Subtype:
Regular
Time Type:
Full time
Scheduled Weekly Hours:
40
Department:
LLE-Laboratory for Laser Energ
Work Shift:
UR - Day (United States of America)
Range:
UR URG 112
Compensation Range:
$70,197.00 - $105,295.00
_The referenced pay range represents the minimum and maximum compensation for this job. Individual annual salaries/hourly rates will be set within the job's compensation range, and will be determined by considering factors including, but not limited to, market data, education, experience, qualifications, expertise of the individual, and internal equity considerations._
**Responsibilities:**
The Laboratory for Laser Energetics (LLE) of the University of Rochester is a unique national resource for research and education in science and technology focusing on using lasers to initiate fusion and high energy density physics.
The LLE Electronics and Controls Engineering group has a broad portfolio of custom embedded electronics and consumer off the shelf (COTS) products deployed across the lab. We are seeking an experienced FPGA design engineer to aid in the development of new solutions and support of the exiting install base of devices across the facility. The successful candidate should have a BSEE/BSEET and 3 years of experience or equivalent training and experience.
Requirements:
- Strong working knowledge of VHDL coding
- Experience with RTL simulation
- Familiarity with circuit design, development, and troubleshooting
Desired skills or experience includes:
- Experience with AMD/Xilinx Vivado or ISE
- Familiarity with high-speed transceivers used in PCIe or fiber optics
- Embedded programming in Linux
- CAD schematic capture
The University of Rochester is committed to fostering, cultivating, and preserving an inclusive and welcoming culture to advance the University's Mission to Learn, Discover, Heal, Create - and Make the World Ever Better. In support of our values and those of our society, the University is committed to not discriminating on the basis of age, color, disability, ethnicity, gender identity or expression, genetic information, marital status, military/veteran status, national origin, race, religion, creed, sex, sexual orientation, citizenship status, or any other characteristic protected by federal, state, or local law (Protected Characteristics). This commitment extends to non-discrimination in the administration of our policies, admissions, employment, access, and recruitment of candidates, for all persons consistent with our values and based on applicable law.
Notice: If you are a **Current** **Employee,** please **log into myURHR** to search for and apply to jobs using the Jobs Hub. Your application, if submitted using this portal, cannot be moved forward.
**Learn. Discover. Heal. Create.**
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Summary

An FPGA Design Engineer is sought to implement, test, and document RTL running on spaceborne radio frequency, networking, computing, and optical communications products. This individual will also help architect FPGA modules and designs on the latest generations of Xilinx FPGA/SoC devices. The candidate must be a self-starter with good time management skills, a great attitude, and very strong attention to detail.

Responsibilities

• Develop RTL modules and top-level implementations with appropriate testbench and test verification environments

• Execute full development life cycle: requirement capture, architecture, implementation, testing, and integration

• Collaborate with other design disciplines, including electrical engineering, software engineering, and systems engineering

• Support electrical engineers during various phases of board verification: design, bring-up, and test

Qualifications

• Bachelors degree in Electrical Engineering or related technical field along with 35+ years of FPGA design experience

• Highly proficient in RTL (Verilog or VHDL) languages

• Highly proficient with Xilinx Viv ado FPGA tool flows

• Advanced knowledge of SoC architecture/design and industry-standard interfaces

• Experience integrating and testing third-party IP blocks

• Knowledgeable in scripting/programming languages primarily Tcl and Python

• Highly proficient in Microsoft Office products (Word, Excel, PowerPoint, and Visio)

• Excellent expository writing and verbal presentation skills

• Must be a U.S. Person (due to export control and security-related requirements)

Hardware FPGA Design Engineer
Apply ( Location:Maynard, Massachusetts, US
+ Area of InterestEngineer - Hardware
+ Compensation Range USD - USD
+ Job TypeProfessional
+ Technology InterestAI or Artificial Intelligence, Cloud and Data Center, Networking
+ Job Id
**The application window is expected to close on: 9/30/2025**
**Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.**
**Meet the Team**
**Acacia, now part of Cisco, designs intelligent optical transceivers using sophisticated signal processing and photonic integration for >1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. The team is a versatile and upbeat team of enthusiastic engineers in an environment where team members experience mutual enhancement and improvement. You will have the opportunity to collaborate cross-functionally with our Hardware, Software, Optics, and manufacturing teams.**
**Your Impact**
**You are a high-energy FGPA Design engineer who loves to work on complex communications products. You are a team player with a startup mentality who loves to challenge the status quo with creation and innovation. You can figure things out by yourself, but you are comfortable to participate in our friendly and team-oriented collaboration approach to learn from others. You are not shy to point out how we can be more effective as a team, and yet you are open to similar suggestions by your team members to foster mutual growth for all.**
+ **Design/Verify FGPAs For Acacia's Product and Evaluation platform**
+ **Write Python routines for Test Development and Automation**
+ **Contribute to FPGA Emulation of ASIC Blocks**
+ **Contribute to our custom ASIC RTL code**
**Minimum Qualifications:**
+ **Bachelors +8 years of experience, or Masters +6 years of experience, or PHD +3 years of experience of related experience or higher with minimum**
+ **5+ years of FPGA design and verification experience**
+ **Experience in Verilog RTL coding and synthesis for FPGAs**
+ **Experience with Python and Linux**
+ **Experience designing interfaces with Processors, SPI & I2C devices, MDIO, high speed SERDES, etc.**
+ **Experience in Xilinx® design tool chain for design, place, and route (ISE®, Vivado® suite)**
**Preferred Qualifications:**
+ **C/C++ and experience coding with embedded MCUs**
+ **Experience in designs and timing closure with multiple clock domains**
+ **Experience work in labs and experience with test equipment to help with board level and FPGA bring up**
+ **Experience with analog components (OpAmps, DACs/ADCs, etc.)**
+ **Experience implementing digital control loops and DSP functions**
+ **Experience with Xilinx FPGA families such as Ultrascale+**
+ **Experience with Synopsys VCS simulation and Synplify® synthesis tools for FPGAs**
+ **Expertise in creating FPGA implementations from ASIC RTL code**
+ **Expertise in digital design of standard cell ASICs**
+ **Experience presenting technical information to technical and non-technical audiences.**
**Why Cisco?**
**At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put - we power the future.**
**Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.**
**Message to applicants applying to work in the U.S. and/or Canada:**
When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees haveaccess ( to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings.
Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days of vacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco's flexible Vacation Time Off policy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco's Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter. Up to 80 hours of unused sick time will be carried forward from one calendar year to the next such that the maximum number of sick time hours an employee may have available is 160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:
.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
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Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.