8,328 Ic Design jobs in the United States
Analog IC Design Engineer
75219 Dallas, Texas
Texas Instruments
Posted 15 days ago
Job Viewed
Job Description
**Position Overview:**
We are seeking a highly skilled and experienced Analog and Mixed Signal Designer to lead and drive the development of cutting-edge embedded Flash Memory IPs; which are comprised of analog and mixed signal circuits. The ideal candidate will have a strong analog/mixed-signal background, with hands on embedded Flash memory design experience and a deep understanding of underlying device physics.
**Key Responsibilities:**
Technical Leadership:
+ Oversee the design, development, and verification of analog and mixed-signal circuits for flash memory development, including charge pumps, voltage regulators, sense amplifiers, and memory interfaces
+ Define and review circuit architectures to optimize performance, power, and area (PPA)
+ Drive innovation in circuit design to address industry challenges in scaling, performance, and reliability for flash
+ Provide technical guidance and direction to team members, ensuring timely project execution
+ Collaborate with world-wide cross-functional teams, including layout, process, test engineering, and product teams
+ Ensure designs meet technical specifications, project timelines, and quality standards
+ Identify and mitigate design risks, ensuring robust circuit performance under process, voltage, and temperature (PVT) variations
Collaboration and Communication:
+ Interface with Process teams (Process Integration Engineers) to optimize technology for flash/NVM applications
+ Present project updates, technical reviews, and status reports to stakeholders and senior management
Innovation and Continuous Improvement:
+ Stay updated on industry trends, emerging technologies, and best practices in embedded flash and analog design
+ Drive continuous improvement in design methodologies, tools, and workflows
**Why TI?**
+ Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.
+ We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI ( Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us.
**About Texas Instruments**
Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com .
Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws.
If you are interested in this position, please apply to this requisition.
**Minimum Qualifications:**
+ Bachelor's degree in Electrical Engineering, Microelectronics, or a related field of study
+ 5 + years of experience in analog/mixed-signal circuit design, with a focus on embedded flash development complex designs
+ Deep understanding of NVM/embedded flash operation, including programming, reading, and reliability considerations
+ Working experience with various analog building blocks, such as current mirrors, operational amplifiers, sense amplifiers, charge pumps, oscillators, and LDOs
+ Proficient in design and simulation tools (e.g., Cadence Virtuoso, SPICE, extraction tools)
+ Familiarity with process technology and layout considerations for advanced nodes (28nm)
+ Device physics experience, related to reliability and device behavior over PVT
+ Scripting language experience, such as PERL
**Preferred Qualifications:**
+ Experience in silicon bring-up, debug, and characterization
+ Knowledge of reliability challenges such as endurance, retention, and soft errors in flash/NVM
+ Demonstrated strong analytical and problem-solving skills
+ Strong verbal and written communication skills
+ Ability to work in teams and collaborate effectively with people in different functions
+ Strong time management skills that enable on-time project delivery
+ Demonstrated ability to build strong, influential relationships
+ Ability to work effectively in a fast-paced and rapidly changing environment
+ Ability to take the initiative and drive for results
**ECL/GTC Required:** Yes
We are seeking a highly skilled and experienced Analog and Mixed Signal Designer to lead and drive the development of cutting-edge embedded Flash Memory IPs; which are comprised of analog and mixed signal circuits. The ideal candidate will have a strong analog/mixed-signal background, with hands on embedded Flash memory design experience and a deep understanding of underlying device physics.
**Key Responsibilities:**
Technical Leadership:
+ Oversee the design, development, and verification of analog and mixed-signal circuits for flash memory development, including charge pumps, voltage regulators, sense amplifiers, and memory interfaces
+ Define and review circuit architectures to optimize performance, power, and area (PPA)
+ Drive innovation in circuit design to address industry challenges in scaling, performance, and reliability for flash
+ Provide technical guidance and direction to team members, ensuring timely project execution
+ Collaborate with world-wide cross-functional teams, including layout, process, test engineering, and product teams
+ Ensure designs meet technical specifications, project timelines, and quality standards
+ Identify and mitigate design risks, ensuring robust circuit performance under process, voltage, and temperature (PVT) variations
Collaboration and Communication:
+ Interface with Process teams (Process Integration Engineers) to optimize technology for flash/NVM applications
+ Present project updates, technical reviews, and status reports to stakeholders and senior management
Innovation and Continuous Improvement:
+ Stay updated on industry trends, emerging technologies, and best practices in embedded flash and analog design
+ Drive continuous improvement in design methodologies, tools, and workflows
**Why TI?**
+ Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.
+ We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI ( Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us.
**About Texas Instruments**
Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com .
Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws.
If you are interested in this position, please apply to this requisition.
**Minimum Qualifications:**
+ Bachelor's degree in Electrical Engineering, Microelectronics, or a related field of study
+ 5 + years of experience in analog/mixed-signal circuit design, with a focus on embedded flash development complex designs
+ Deep understanding of NVM/embedded flash operation, including programming, reading, and reliability considerations
+ Working experience with various analog building blocks, such as current mirrors, operational amplifiers, sense amplifiers, charge pumps, oscillators, and LDOs
+ Proficient in design and simulation tools (e.g., Cadence Virtuoso, SPICE, extraction tools)
+ Familiarity with process technology and layout considerations for advanced nodes (28nm)
+ Device physics experience, related to reliability and device behavior over PVT
+ Scripting language experience, such as PERL
**Preferred Qualifications:**
+ Experience in silicon bring-up, debug, and characterization
+ Knowledge of reliability challenges such as endurance, retention, and soft errors in flash/NVM
+ Demonstrated strong analytical and problem-solving skills
+ Strong verbal and written communication skills
+ Ability to work in teams and collaborate effectively with people in different functions
+ Strong time management skills that enable on-time project delivery
+ Demonstrated ability to build strong, influential relationships
+ Ability to work effectively in a fast-paced and rapidly changing environment
+ Ability to take the initiative and drive for results
**ECL/GTC Required:** Yes
View Now
0
IC Design Engineer
92604 Woodbridge, California
Broadcom
Posted 2 days ago
Job Viewed
Job Description
**Please Note:**
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
View Now
1
IC Design Engineer
95115 San Jose, California
Broadcom
Posted 2 days ago
Job Viewed
Job Description
**Please Note:**
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team.
Job Description:
+ Leading STA efforts in complex compute blocks
+ Will be responsible for defining/ co-defining timing constraints with the customer and interface with the physical design team
+ Responsible to drive state of the art in timing closure
+ Participate/contribute in silicon bring-up, characterization, and silicon test
+ Participate in timing closure of the blocks with best PPA (power/performance/area)
**Ideal Candidate Will Have:**
+ The candidate should have a strong understanding of VLSI and ASIC physical design
+ Significant experience with synthesis and physical synthesis tools (Synopsys and Cadence tool suites preferred)
+ Deep understanding of PLLs and clock networks
+ Significant experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence Tempus.
+ - Ability to create and debug timing constraints
+ - Ability to understand and debug warning and error messages from the timing tool
+ - Ability to generate and understand timing reports
+ Deep understanding of STA concepts
+ - Solid understanding of RC networks and how they affect the timing/propagation of signals
+ - Understanding of Signal Integrity, Crosstalk Delay, and Glitch/Noise Analysis
+ - Understanding of setup analysis, hold analysis, and other timing checks
+ - Ability to understand and create timing diagrams
+ Deep understanding of more advanced STA concepts
+ - POCV/SOCV/LVF modeling of variation
+ - MIS - multi input switching
+ - CCS/ECSM/NLDM - liberty timing models
+ - PBA - path based analysis
+ - LOCV/SOCV - location aware timing derates
+ Experience using SPICE analysis
+ Master's degree in Engineering with 6+ years of hands-on experience in Place and route tools, or PhD (preferred) with 3+ years of experience.
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team.
Job Description:
+ Leading STA efforts in complex compute blocks
+ Will be responsible for defining/ co-defining timing constraints with the customer and interface with the physical design team
+ Responsible to drive state of the art in timing closure
+ Participate/contribute in silicon bring-up, characterization, and silicon test
+ Participate in timing closure of the blocks with best PPA (power/performance/area)
**Ideal Candidate Will Have:**
+ The candidate should have a strong understanding of VLSI and ASIC physical design
+ Significant experience with synthesis and physical synthesis tools (Synopsys and Cadence tool suites preferred)
+ Deep understanding of PLLs and clock networks
+ Significant experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence Tempus.
+ - Ability to create and debug timing constraints
+ - Ability to understand and debug warning and error messages from the timing tool
+ - Ability to generate and understand timing reports
+ Deep understanding of STA concepts
+ - Solid understanding of RC networks and how they affect the timing/propagation of signals
+ - Understanding of Signal Integrity, Crosstalk Delay, and Glitch/Noise Analysis
+ - Understanding of setup analysis, hold analysis, and other timing checks
+ - Ability to understand and create timing diagrams
+ Deep understanding of more advanced STA concepts
+ - POCV/SOCV/LVF modeling of variation
+ - MIS - multi input switching
+ - CCS/ECSM/NLDM - liberty timing models
+ - PBA - path based analysis
+ - LOCV/SOCV - location aware timing derates
+ Experience using SPICE analysis
+ Master's degree in Engineering with 6+ years of hands-on experience in Place and route tools, or PhD (preferred) with 3+ years of experience.
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
View Now
2
IC Design Engineer
92604 Woodbridge, California
Broadcom
Posted 2 days ago
Job Viewed
Job Description
**Please Note:**
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
View Now
3
IC Design Engineer
92604 Woodbridge, California
Broadcom
Posted 2 days ago
Job Viewed
Job Description
**Please Note:**
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
View Now
4
IC Design Engineer
95115 San Jose, California
Broadcom
Posted 2 days ago
Job Viewed
Job Description
**Please Note:**
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
View Now
5
IC Design Engineer
92604 Woodbridge, California
Broadcom
Posted 2 days ago
Job Viewed
Job Description
**Please Note:**
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team.
Job Description:
+ Leading STA efforts in complex compute blocks
+ Will be responsible for defining/ co-defining timing constraints with the customer and interface with the physical design team
+ Responsible to drive state of the art in timing closure
+ Participate/contribute in silicon bring-up, characterization, and silicon test
+ Participate in timing closure of the blocks with best PPA (power/performance/area)
**Ideal Candidate Will Have:**
+ The candidate should have a strong understanding of VLSI and ASIC physical design
+ Significant experience with synthesis and physical synthesis tools (Synopsys and Cadence tool suites preferred)
+ Deep understanding of PLLs and clock networks
+ Significant experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence Tempus.
+ - Ability to create and debug timing constraints
+ - Ability to understand and debug warning and error messages from the timing tool
+ - Ability to generate and understand timing reports
+ Deep understanding of STA concepts
+ - Solid understanding of RC networks and how they affect the timing/propagation of signals
+ - Understanding of Signal Integrity, Crosstalk Delay, and Glitch/Noise Analysis
+ - Understanding of setup analysis, hold analysis, and other timing checks
+ - Ability to understand and create timing diagrams
+ Deep understanding of more advanced STA concepts
+ - POCV/SOCV/LVF modeling of variation
+ - MIS - multi input switching
+ - CCS/ECSM/NLDM - liberty timing models
+ - PBA - path based analysis
+ - LOCV/SOCV - location aware timing derates
+ Experience using SPICE analysis
+ Master's degree in Engineering with 6+ years of hands-on experience in Place and route tools, or PhD (preferred) with 3+ years of experience.
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team.
Job Description:
+ Leading STA efforts in complex compute blocks
+ Will be responsible for defining/ co-defining timing constraints with the customer and interface with the physical design team
+ Responsible to drive state of the art in timing closure
+ Participate/contribute in silicon bring-up, characterization, and silicon test
+ Participate in timing closure of the blocks with best PPA (power/performance/area)
**Ideal Candidate Will Have:**
+ The candidate should have a strong understanding of VLSI and ASIC physical design
+ Significant experience with synthesis and physical synthesis tools (Synopsys and Cadence tool suites preferred)
+ Deep understanding of PLLs and clock networks
+ Significant experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence Tempus.
+ - Ability to create and debug timing constraints
+ - Ability to understand and debug warning and error messages from the timing tool
+ - Ability to generate and understand timing reports
+ Deep understanding of STA concepts
+ - Solid understanding of RC networks and how they affect the timing/propagation of signals
+ - Understanding of Signal Integrity, Crosstalk Delay, and Glitch/Noise Analysis
+ - Understanding of setup analysis, hold analysis, and other timing checks
+ - Ability to understand and create timing diagrams
+ Deep understanding of more advanced STA concepts
+ - POCV/SOCV/LVF modeling of variation
+ - MIS - multi input switching
+ - CCS/ECSM/NLDM - liberty timing models
+ - PBA - path based analysis
+ - LOCV/SOCV - location aware timing derates
+ Experience using SPICE analysis
+ Master's degree in Engineering with 6+ years of hands-on experience in Place and route tools, or PhD (preferred) with 3+ years of experience.
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
View Now
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About the latest Ic design Jobs in United States !
6
IC Design Engineer
95115 San Jose, California
Broadcom
Posted 2 days ago
Job Viewed
Job Description
**Please Note:**
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
View Now
7
IC Design Engineer
95115 San Jose, California
Broadcom
Posted 2 days ago
Job Viewed
Job Description
**Please Note:**
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
**Job Description: IC Design Engineer**
+ Participate in IP level architectural definition including micro-architecture definition
+ Perform RTL design using Verilog HDL, with an emphasis on performance and area
+ Implement multi-power and low-power designs
+ Analyze and resolve Lint and Clock/Reset Domain crossing issues in the design
+ Collaborate with verification team on test plan development, debugging, and coverage closure
+ Collaborate with physical design team on constraint generation, timing closure analysis, formal verification, low power checks using UPF/CPF flows and ECO implementation.
+ Support system level validation efforts on FPGA/emulation
+ Support silicon bring-up and debug efforts
**Job Requirements**
BS+ 8+ years of relevant industry experience. Advanced degree preferred
Must have strong Logic Design, RTL coding (Verilog HDL) and debugging skills
Must have an understanding of low power design and validation techniques including UPF/CPF
Must be familiar with design constraint generation, logic synthesis, timing closure analysis and Clock/Reset domain crossing checks
Must be able to assist in silicon and FPGA debug and bring-up
Experience with the following are highly desired
+ ARM CPUs
+ Memory controllers
+ Peripherals such as I2C, SPI and UART
+ Peripherals and interconnect protocols such as APB, AHB and AXI
Experience with the following are a definite advantage
+ Digital Signal Processing designs, usage of Matlab and Simulink
+ Scripting languages such as (Python perl/tcl)
+ Mixed signal design
Other Requirements
+ Self-motivated
+ Ability to work independently
+ Good verbal and written communication skills
+ Ability to work with remote and cross functional teams
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
**Job Description: IC Design Engineer**
+ Participate in IP level architectural definition including micro-architecture definition
+ Perform RTL design using Verilog HDL, with an emphasis on performance and area
+ Implement multi-power and low-power designs
+ Analyze and resolve Lint and Clock/Reset Domain crossing issues in the design
+ Collaborate with verification team on test plan development, debugging, and coverage closure
+ Collaborate with physical design team on constraint generation, timing closure analysis, formal verification, low power checks using UPF/CPF flows and ECO implementation.
+ Support system level validation efforts on FPGA/emulation
+ Support silicon bring-up and debug efforts
**Job Requirements**
BS+ 8+ years of relevant industry experience. Advanced degree preferred
Must have strong Logic Design, RTL coding (Verilog HDL) and debugging skills
Must have an understanding of low power design and validation techniques including UPF/CPF
Must be familiar with design constraint generation, logic synthesis, timing closure analysis and Clock/Reset domain crossing checks
Must be able to assist in silicon and FPGA debug and bring-up
Experience with the following are highly desired
+ ARM CPUs
+ Memory controllers
+ Peripherals such as I2C, SPI and UART
+ Peripherals and interconnect protocols such as APB, AHB and AXI
Experience with the following are a definite advantage
+ Digital Signal Processing designs, usage of Matlab and Simulink
+ Scripting languages such as (Python perl/tcl)
+ Mixed signal design
Other Requirements
+ Self-motivated
+ Ability to work independently
+ Good verbal and written communication skills
+ Ability to work with remote and cross functional teams
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
View Now
8
IC Design Engineer
95115 San Jose, California
Broadcom
Posted 2 days ago
Job Viewed
Job Description
**Please Note:**
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
**1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)**
**2. If you already have a Candidate Account, please Sign-In before you apply.**
**Job Description:**
The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking
a motivated and technically strong engineer to join our team.
Job Description:
Layout design of digital high-performance blocks
Timing closure of the blocks with best PPA (power/performance/area)
ebug LVS/DRC/ERC errors with verification tool
nalyze the trade-offs and performance implications of different cell architectures
ollaborate with design and layout engineers to optimize layout for area and performance
ork with CAD, packaging and foundry teams in resolving layout and/or verification issues
Ideal Candidate Will Have:
trong understanding of physical implementation.
xperience working with advanced semiconductor technologies.
xperience in implementing low power and high-performance cores
xcellent communication and cross-functional collaboration skills.
bility to analyze complex trade-offs and make data-driven decisions.
aster's degree with 6+ years or PhD with 3+ years of hands-on experience with Place and route tools; PhD in Engineering is a plus
Join us in shaping the next generation of high-performance compute technologies.
**Additional Job Description:**
**Compensation and Benefits**
The annual base salary range for this position is $120,000 - $192,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
**Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**
**If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.**
Welcome! Thank you for your interest in Broadcom!
We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
For more information please visit our video library ( and check out our Connected by Broadcom ( series.
Follow us on Linked In Broadcom Inc ( .
View Now
9