1,585 Cpu jobs in the United States
WAREHOUSE/CPU
Posted today
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Job Description
Description: WAREHOUSE ASSISTANT/CPU
The Warehouse Assistant provides support to the Operations team by assisting with warehouse operations and adhering to product quality standards, in addition to fulfilling customer pick up duties. Responsible for assisting with the care of inventoried assets, prepping equipment for events, shipping, and facilitating client pickups are the main focuses of this role. This position is an extension of the on-site teams, and as such, business levels at times dictate the need to take part in the installation and dismantle of events.
Benefits
- Safe Harbor 401k with 5% Match
- Employee Referral Bonus Program
- PTO and Holiday Pay, including Floating Holiday
- Insurance Benefits including Medical (with HSA and FSA options), Dental, Vision, Life & Disability
- Potential for Overtime (hours vary by season)
- Eligible for annual increases based on performance
- Opportunities for professional growth
Under the supervision of the General Manager, primary responsibilities include:
- Maintaining the accuracy of inventoried assets on a daily basis
- Assist with maintaining quality control of assets by checking for cleanliness, damage, and manage accordingly through company process for repair
- Facilitate internal equipment transfers
- Maintain inventory of equipment assigned to events through accuracy of company paperwork
- Follow warehouse safety and regulations
- Knowledgeable in all products Quest Events offers, including installation and dismantling
- Responsible for the organization and cleanliness of warehouse area
- Responsible for Customer Service related duties such as rental equipment drop off/pickup
Requirements: Requirements
Required Knowledge, Skills, and Abilities
- 1+ year of experience in the Event Industry or warehouse job experience.(Preferred but not mandatoty)
- Ability to adapt to and maintain a varying schedule and work weekends, holidays, and evenings, as needed.
- Inventory and shipping experience preferred
- Must be able to speak, write, and understand English fluently.
- Must be able to positively interact with others on a daily basis.
- Time Management, attention to detail, and organization
- Must be able to problem solve and prioritize needs on a daily basis.
Physical Requirements:
- Ability to lift 62lbs and work on a step ladder without exceeding maximum weight allowance.
- Ability to stand, walk, stoop, and bend throughout the day for extended periods of time.
CPU Implementation Engineer
Posted 1 day ago
Job Viewed
Job Description
CPU Implementation Engineer
Austin, Texas, United States
Hardware
Summary
Posted: Aug 06, 2025
Role Number: 200613755-0157
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product!
Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.
Description
As a CPU Implementation Engineer, you will own or participate in the following:
• Work with Micro-architects to define memory subsystem, perform feasibility, make area, frequency, performance, power trade-offs and design and balance the pipeline stages. • Help drive RTL-to-GDS flow through synthesis and place-and-route targeting ambitious targets for power, performance, and area. • Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power.
Minimum Qualifications
-
Minimum BS
-
Academic coursework or industry experience in VLSI and/or digital circuit design
-
Experience with scripting in Perl or TCL
Preferred Qualifications
-
Familiarity with high performance microprocessor architecture
-
Knowledge of logic design principles along with timing and power implications
-
Understanding of low power microarchitecture and implementation techniques
-
Design exposure in deep sub-micron technologies and device physics
-
Experience using synthesis & place-route tools
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .
Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.
Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program ( .
Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .
Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .
Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you’re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.
It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.
CPU Implementation Engineer
Posted 2 days ago
Job Viewed
Job Description
CPU Implementation Engineer
Santa Clara, California, United States
Hardware
Summary
Posted: Jun 25, 2025
Role Number: 200573743-3760
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!
Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.
Description
As a CPU Implementation Engineer, you will drive or participate in the following:
• Work with micro-architects to help define the micro-architecture and assist with design feasibility and power, performance, and area (PPA) trade-offs • Drive RTL-to-GDS design convergence through microarchitecture and logic (RTL) optimizations using synthesis and place-and-route tools targeting ambitious goals for PPA • Responsible for block-level design delivery along with closure of backend flows, electrical requirements, and improving silicon yield • Work closely with internal CAD and PD methodology teams on industry-standard synthesis/PNR tool features and optimizations and their adoption in CPU design • Work with x-functional top-level teams on the aspects of CPU floorplan, timing, power, reliability, and testability • Work closely with custom IP teams to define and co-optimize memory macros, library standard cells to improve design PPA
Minimum Qualifications
-
Minimum BS and 10+ years of relevant industry experience
-
Experience in logic design and digital circuits
-
Experience with low power and high frequency design techniques
-
Experience in TCL or Perl
Preferred Qualifications
-
Familiarity with high performance CPU microprocessor architecture and memory sub-system
-
Knowledge in deep sub-micon technology along with its implications to timing, power, and area
-
Must have proficiency in using industry standard logic Synthesis, PnR, STA and Power analysis tools along with floor-planning, physical design partitioning, and timing budgeting, to converge complex designs
-
Excellent communication and interpersonal skills
-
Ability to work independently and/or lead a physical design partition in collaboration with x-functional teams
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.Learn more about Apple Benefits. (
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .
Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.
Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program ( .
Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .
Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .
Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you’re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.
It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.
CPU Implementation Engineer
Posted 2 days ago
Job Viewed
Job Description
CPU Implementation Engineer
Beaverton, Oregon, United States
Hardware
Summary
Posted: Mar 14, 2025
Role Number: 200595116-0505
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!
Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.
Description
As a CPU Implementation Engineer, you will drive or participate in the following:
• Work with micro-architects to help define the micro-architecture and assist with design feasibility and power, performance, and area (PPA) trade-offs • Drive RTL-to-GDS design convergence through microarchitecture and logic (RTL) optimizations using synthesis and place-and-route tools targeting ambitious goals for PPA • Responsible for block-level design delivery along with closure of backend flows, electrical requirements, and improving silicon yield • Work closely with internal CAD and PD methodology teams on industry standard synthesis/PNR tool features and optimizations and their adoption in CPU design • Work with x-functional top-level teams on the aspects of CPU floorplan, timing, power, reliability, and testability • Work closely with custom IP teams to define and co-optimize memory macros, library standard cells to improve design PPA
Minimum Qualifications
-
Minimum BS and 10+ years of relevant industry experience
-
Experience in logic design and digital circuits
-
Experience with low power and high frequency design techniques
-
Experience in TCL or Perl
Preferred Qualifications
-
Familiarity with high performance CPU microprocessor architecture and memory sub-system
-
Knowledge in deep sub-micon technology along with its implications to timing, power, and area
-
Must have proficiency in using industry standard logic Synthesis, PnR, STA and Power analysis tools along with floor-planning, physical design partitioning, and timing budgeting, to converge complex designs
-
Excellent communication and interpersonal skills
-
Ability to work independently and/or lead a physical design partition in collaboration with x-functional teams
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.Learn more about your EEO rights as an applicant ( .
Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation.
Apple participates in the E-Verify program in certain locations as required by law.Learn more about the E-Verify program ( .
Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Reasonable Accommodation and Drug Free Workplace policy Learn more .
Apple is a drug-free workplace. Reasonable Accommodation and Drug Free Workplace policy Learn more .
Apple will consider for employment all qualified applicants with criminal histories in a manner consistent with applicable law. If you’re applying for a position in San Francisco, review the San Francisco Fair Chance Ordinance guidelines applicable in your area.
It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.
CPU Security Architect
Posted 4 days ago
Job Viewed
Job Description
2 weeks ago Be among the first 25 applicants Get AI-powered advice on this job and more exclusive features. Company Qualcomm Technologies, Inc. Job Area Engineering Group, Engineering Group > SoC Architecture General Summary As an experienced CPU security architect, you will define the next generation CPU, SoC and platform level security technologies. These include architecting high assurance confidential computing features, developing advanced Microarchitectural countermeasures, memory safety, control flow integrity and isolation primitives. In addition, you will work with SoC architects for different product lines to drive the next generation chip architectures to maximize overall PPA efficiency while striving for the highest security assurance for the target markets. Minimum Qualifications Bachelor's degree in Electrical Engineering, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR Master's degree in Electrical Engineering, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR PhD in Electrical Engineering, Computer Science, or related field and 6+ years of Systems Engineering or related work experience. 2+ years of experience in one or more system architecture technology areas and products (e.g., Power System, Shared Resource Management, Limits/Thermal Management, Hardware Islands). Requirements MS in Electrical Engineering, Computer Science/Engineering with 10 years of industry experience Proven experience in CPU and system security architecture Deep understanding of memory safety, control flow integrity, isolation/virtualization technologies Strong understanding and experience in at least one CPU ISA like ARM, x86, Risc-V Experience with performing threat modeling, security risk analysis, or security architecture Good understanding of cryptographic algorithms and protocols Strong analytical, problem-solving and communication skills Preferred Qualifications PhD degree in Electrical Engineering/Computer Science; 5 years of practical experience Experience in microarchitecture and design of HW security components including isolated security sub-systems Experience in CPU micro-architectural security constructs and countermeasures Hands on HW design experience for CPU sub-components Experience in automotive Cybersecurity process and deliverables Good understanding of building blocks for enabling various confidential computing technologies Role And Responsibilities Design and implement new CPU security features and functions to counteract potential threats Analyze and evaluate current CPU architectures for potential security risk Collaborate with HW and SW engineering teams to ensure secure design principles are properly implemented. Deliver security architecture specification to broader teams and define requirements for subsystem architects. Conduct regular security assessments and recommend changes as necessary. Stay updated on the latest industry trends, threats, and vulnerabilities to keep security systems up-to-date. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@ or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay Range And Other Compensation & Benefits $211,900.00 - $17,900.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link. If you would like more information about this role, please contact Qualcomm Careers. 3075327 Seniority level Seniority level Not Applicable Employment type Employment type Full-time Job function Job function Other Industries Telecommunications Referrals increase your chances of interviewing at Qualcomm by 2x Sign in to set job alerts for Security Architect roles. Principal Industrial Security Analyst - R10201543 San Diego, CA 118,200.00- 204,300.00 8 hours ago San Diego, CA 118,200.00- 204,300.00 8 hours ago San Diego, CA 118,200.00- 204,300.00 8 hours ago San Diego, CA 118,200.00- 204,300.00 8 hours ago San Diego, CA 118,200.00- 204,300.00 8 hours ago San Diego, CA 118,200.00- 204,300.00 8 hours ago San Diego, CA 118,200.00- 204,300.00 8 hours ago San Diego, CA 118,200.00- 204,300.00 8 hours ago San Diego, CA 118,200.00- 204,300.00 8 hours ago San Diego, CA 118,200.00- 204,300.00 8 hours ago Mainframe Security Architect - Expertise in the IBM Z Secure suite required (No H1B Visa) Remoteo Senior Security Engineer - Security Event Analysis Team (SEAT) Sr Principal Industrial Security Analyst - R10201939 San Diego, CA 118,200.00- 204,300.00 8 hours ago Senior Offensive Security Engineer (San Diego or Irvine) San Diego, CA 152,100.00- 262,800.00 8 hours ago San Diego, CA 152,100.00- 262,800.00 8 hours ago Cybersecurity - TVM - Vulnerability Management - Senior - Consulting - Location OPEN Delivery Consultant - Cloud Security, NAMER We're unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI. #J-18808-Ljbffr
CPU Security Architect
Posted 11 days ago
Job Viewed
Job Description
Company:
Qualcomm Technologies, Inc.
Job Area:
Engineering Group, Engineering Group > SoC Architecture
General Summary:
As an experienced CPU security architect, you will define the next generation CPU, SoC and platform level security technologies. These include architecting high assurance confidential computing features, developing advanced Microarchitectural countermeasures, memory safety, control flow integrity and isolation primitives. In addition, you will work with SoC architects for different product lines to drive the next generation chip architectures to maximize overall PPA efficiency while striving for the highest security assurance for the target markets.
Minimum Qualifications:
• Bachelor's degree in Electrical Engineering, Computer Science, or related field and 8+ years of Systems Engineering or related work experience.
OR
Master's degree in Electrical Engineering, Computer Science, or related field and 7+ years of Systems Engineering or related work experience.
OR
PhD in Electrical Engineering, Computer Science, or related field and 6+ years of Systems Engineering or related work experience.
• 2+ years of experience in one or more system architecture technology areas and products (e.g., Power System, Shared Resource Management, Limits/Thermal Management, Hardware Islands).
Requirements:
-
MS in Electrical Engineering, Computer Science/Engineering with 10 years of industry experience
-
Proven experience in CPU and system security architecture
-
Deep understanding of memory safety, control flow integrity, isolation/virtualization technologies
-
Strong understanding and experience in at least one CPU ISA like ARM, x86, Risc-V
-
Experience with performing threat modeling, security risk analysis, or security architecture
-
Good understanding of cryptographic algorithms and protocols
-
Strong analytical, problem-solving and communication skills
Preferred Qualifications:
-
PhD degree in Electrical Engineering/Computer Science; 5 years of practical experience
-
Experience in microarchitecture and design of HW security components including isolated security sub-systems
-
Experience in CPU micro-architectural security constructs and countermeasures
-
Hands on HW design experience for CPU sub-components
-
Experience in automotive Cybersecurity process and deliverables
-
Good understanding of building blocks for enabling various confidential computing technologies
Role and Responsibilities:
-
Design and implement new CPU security features and functions to counteract potential threats
-
Analyze and evaluate current CPU architectures for potential security risk
-
Collaborate with HW and SW engineering teams to ensure secure design principles are properly implemented.
-
Deliver security architecture specification to broader teams and define requirements for subsystem architects.
-
Conduct regular security assessments and recommend changes as necessary.
-
Stay updated on the latest industry trends, threats, and vulnerabilities to keep security systems up-to-date.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail or call Qualcomm's toll-free number found here ( . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range and Other Compensation & Benefits :
$211,900.00 - $317,900.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link .
If you would like more information about this role, please contact Qualcomm Careers ( .
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification
SoC CPU Architect
Posted 11 days ago
Job Viewed
Job Description
The Samsung Research America SOC Architecture Lab provides innovative SoC architecture, bus / memory subsystem, multimedia subsystems and key IP blocks for future Samsung Galaxy products (Smartphones, tablets and future devices). We are defining the high performance SoC architecture development for various Galaxy device lineups. This lab collaborates with Samsung's strategic SoC partners, Samsung MX headquarter team, and key R&D teams around the globe to innovate and reinvent technology that will positively impact millions of people around the world via the Galaxy flagship products.
Position Summary:
The CPU Architect role at Samsung Research America focuses on advancing technology solutions for smartphone and mobile platforms. In this role, you will be responsible for leading the development of high impact product. Role involves architecting, designing and modeling cutting edge CPU and its subsystem. This role requires both technical expertise and strong leadership skills to guide cross-functional team and ensure alignment with organization's strategic goals. This role is integral to the SoC Architecture Lab, which is part of Samsung Research America and the extension of Samsung's Mobile Experience Division.
Position Responsibilities:
- Perform CPU microarchitecture modeling and simulations to evaluate performance, power, area and ensure design robustness
- Lead and participate in the design of key CPU components, including instruction pipelines, branch prediction, execution units, and memory subsystems
- Identify, debug, and resolve architectural and microarchitectural bottlenecks
- Drive continuous improvement initiatives by evaluating new tools, methodologies, and technologies for potential integration into the microarchitecture design flow
- Contribute to the CPU roadmap by identifying new techniques, features, and optimizations to stay ahead of industry trends
- Collaborate closely with SOC team to align CPU microarchitecture requirements with broader organizational objectives
- Bachelors, Msters or PhD in Electrical/Computer Engineering, Computer Science, related Science or equivalent combination of education, training and experience
- 15+ years of industry experience working experience in CPU architecture & development
- Experience in CPU design and microarchitecture, with hands-on experience in developing and optimizing microarchitectures for high-performance CPU cores
- Strong understanding of CPU architectures, instruction sets (such as x86, ARM, RISC-V), and microarchitecture design principles (out-of-order execution, multi-level caches, branch prediction, etc.)
- Proven experience in microarchitecture modeling, simulation, and performance evaluation
- Deep knowledge of pipelining, superscalar execution, and out-of-order execution architectures
- Familiarity with memory hierarchies, including caches, TLBs, and memory management, cache coherence protocols etc
- Proficiency in architecture analysis and performance modeling, ranging from simple analytical models to complex cycle accurate performance model and correlation
- Strong modelling and simulator development skills and able to code in C, C++, python and similar programming languages
- Experience with power and performance trade-offs
Our total rewards programs are designed to motivate and engage exceptional talent. The base pay range for roles at this level is listed below, but may be higher or lower in other states due to geographic differentials in the labor market. Within the base pay range, individual rates depend on a number of factors-including the role's function and location as well as the individual's knowledge, skills, experience, education and training. This is part of our comprehensive compensation package with annual bonus eligibility and generous benefits to help you live life well.
Base Pay Range
$188,400-$282,450 USD
Additional Information
Disclosure of Trade Secrets
Samsung has a strict policy on trade secrets. In applying to Samsung and progressing through the recruitment process, you must not disclose any trade secrets of a current or previous employer.
Essential Job Functions
This position will be performed in an office setting. The position will require the incumbent to sit and stand at a desk, communicate in person and by telephone, and frequently operate standard office equipment, such as telephones and computers.
Samsung Research America is committed to complying with all Federal, State and local laws related to the employment of qualified individuals with disabilities. If you are an individual with a disability and would like to request a reasonable accommodation as part of the employment selection process, please contact the recruiter or email
Equal Employment Opportunity
At Samsung, we believe that innovation and growth are driven by an inclusive culture and a diverse workforce. We aim to create a global team where everyone belongs and has equal opportunities, inspiring our talent to be their true selves. Together, we are building a better tomorrow for our customers, partners, and communities.
Samsung Research America is committed to employing a diverse workforce, and provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
For more information regarding protection from discrimination under Federal law for applicants and employees, please refer to this link: Pay Transparency
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CPU Architecture Lead
Posted 1 day ago
Job Viewed
Job Description
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 10 years of experience in high-performance microprocessor architecture, micro-architecture, performance, and design.
+ Experience in performance modeling, analysis, correlation, and workload characterization.
+ Experience in CPU architecture with CPU blocks, and with C/C++ and scripting languages.
**Preferred qualifications:**
+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
+ Experience leading CPU/ML micro-architecture exploration, performance model development, performance analysis, performance correlation, and workload characterization.
+ Knowledge of system software components, such as Linux, drivers, and runtime.
+ Knowledge of processor instruction set architecture (e.g., ARM, RISC-V, x86).
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Lead CPU Architect in architecture and performance, you will be the key contributor to improve processor instruction set architecture, to develop innovative micro-architecture features, and deliver Google's advanced SoC products. You will have the opportunity to collaborate with talents in Google's Android applications and Google's AI teams to plan and conduct application and benchmark performance analysis, and to project their performance at various design phases.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
The US base salary range for this full-time position is $227,000-$320,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .
**Responsibilities:**
+ Work with other engineers and management to define frontend (branch prediction, instruction fetch) microarchitecture that align with the Google CPU business goals.
+ Work with the performance team to define performance analysis tasks and priority to evaluate the microarchitecture concepts.
+ Collaborate with design teams in Performance, Power, Area (PPA) tradeoff analysis for new microarchitecture features.
+ Communicate ideas and performance/PPA results in both qualitative and quantitative fashion to support the decisions.
+ Guide micro-architects to develop and assess innovative CPU microarchitecture ideas.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also and If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form:
CPU Architecture Lead
Posted 1 day ago
Job Viewed
Job Description
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 10 years of experience in high-performance microprocessor architecture, micro-architecture, performance, and design.
+ Experience in performance modeling, analysis, correlation, and workload characterization.
+ Experience in CPU architecture with CPU blocks, and with C/C++ and scripting languages.
**Preferred qualifications:**
+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
+ Experience leading CPU/ML micro-architecture exploration, performance model development, performance analysis, performance correlation, and workload characterization.
+ Knowledge of system software components, such as Linux, drivers, and runtime.
+ Knowledge of processor instruction set architecture (e.g., ARM, RISC-V, x86).
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Lead CPU Architect in architecture and performance, you will be the key contributor to improve processor instruction set architecture, to develop innovative micro-architecture features, and deliver Google's advanced SoC products. You will have the opportunity to collaborate with talents in Google's Android applications and Google's AI teams to plan and conduct application and benchmark performance analysis, and to project their performance at various design phases.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
The US base salary range for this full-time position is $227,000-$320,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .
**Responsibilities:**
+ Work with other engineers and management to define frontend (branch prediction, instruction fetch) microarchitecture that align with the Google CPU business goals.
+ Work with the performance team to define performance analysis tasks and priority to evaluate the microarchitecture concepts.
+ Collaborate with design teams in Performance, Power, Area (PPA) tradeoff analysis for new microarchitecture features.
+ Communicate ideas and performance/PPA results in both qualitative and quantitative fashion to support the decisions.
+ Guide micro-architects to develop and assess innovative CPU microarchitecture ideas.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also and If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form:
CPU Architecture Lead
Posted 1 day ago
Job Viewed
Job Description
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 10 years of experience in high-performance microprocessor architecture, micro-architecture, performance, and design.
+ Experience in performance modeling, analysis, correlation, and workload characterization.
+ Experience in CPU architecture with CPU blocks, and with C/C++ and scripting languages.
**Preferred qualifications:**
+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
+ Experience leading CPU/ML micro-architecture exploration, performance model development, performance analysis, performance correlation, and workload characterization.
+ Knowledge of system software components, such as Linux, drivers, and runtime.
+ Knowledge of processor instruction set architecture (e.g., ARM, RISC-V, x86).
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Lead CPU Architect in architecture and performance, you will be the key contributor to improve processor instruction set architecture, to develop innovative micro-architecture features, and deliver Google's advanced SoC products. You will have the opportunity to collaborate with talents in Google's Android applications and Google's AI teams to plan and conduct application and benchmark performance analysis, and to project their performance at various design phases.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
The US base salary range for this full-time position is $227,000-$320,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .
**Responsibilities:**
+ Work with other engineers and management to define frontend (branch prediction, instruction fetch) microarchitecture that align with the Google CPU business goals.
+ Work with the performance team to define performance analysis tasks and priority to evaluate the microarchitecture concepts.
+ Collaborate with design teams in Performance, Power, Area (PPA) tradeoff analysis for new microarchitecture features.
+ Communicate ideas and performance/PPA results in both qualitative and quantitative fashion to support the decisions.
+ Guide micro-architects to develop and assess innovative CPU microarchitecture ideas.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also and If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: