7,624 Timing Engineer jobs in the United States

Network Timing Engineer
Job Category: Information Technology
Time Type: Full time
Minimum Clearance Required to Start: TS/SCI with Polygraph
Employee Type: Regular
Percentage of Travel Required: Up to 10%
Type of Travel: Continental US
Anticipated Posting End: There is not an anticipated end date for this posting since applications are needed on an ongoing basis.
**Opportunity:**
We are seeking an experienced Network Engineer to design, implement, and maintain a CAN/LAN environment hosting complex command and telemetry systems for satellite and space missions. The ideal candidate will have advanced knowledge of network protocols, data communication systems, and timing synchronization operations.
**Responsibilities:**
+ Troubleshoot complex network issues and provide timely resolutions
+ Identify, diagnose, and resolve issues related to time synchronization systems and performance degradation in both NTP and IRIG-B systems, including specialized timing related cabling such as including RS-232, RS-422, RS-485, Coax, and Twinaxial cables.
+ Provide problem identification, diagnosis, troubleshooting, and resolution of incidents and problems.
+ Provide support for the escalation and communication of status to management and customer.
+ Provide support for the dispatch system and hardware problems and remains involved in the resolution process
+ Isolate and resolve of hardware and software problems involving the applications, the operating system, the hardware, the communications infrastructure, or any combination thereof
+ Troubleshoot, maintain integrity and configure network components along with implementing operating systems enhancements to improve reliability and performance
+ Integrate new technologies into new and existing systems including the transition and migration of corporate systems.
+ Supports hardware infrastructure site surveys, planning, and design.
+ Provide transition planning and support services that accelerate delivery timelines, reduce operational risk and ensure service continuity during transition.
+ Provide transition planning and support for the migration of existing services between environments, migration of users from existing service platforms to new service offerings and transition of services into operations
+ Maintain documentation for network configurations, procedures, and incidents to ensure compliance with best practices and industry standards.
+ Works individually and actively participates on integrated teams
+ Understands and applies more advanced concepts and processes to daily activities.
+ Assists Lead Services Engineers in implementing their activities.
+ Can perform all tasks of lower-level technicians or specialists.
**Qualifications:**
_Required:_
+ Bachelor's degree in Computer Science, Information Technology, or equivalent work experience
+ 10+ years of related work experience
+ TS/SCI w/ poly is required
+ Advanced knowledge of networking protocols (TCP/IP, OSPF, etc.)
+ Expertise in configuring and managing enterprise-level network equipment (Cisco, Juniper, etc.)
+ Experience with time server hardware, such as GPS receivers and IRIG-B generators.
+ Experience with timing connections including RS-232, RS-422, RS-485, Coax, and Twinaxial cabling standards.
+ Strong understanding of network security principles and best practices
+ Proficiency in network monitoring and analysis tools
+ Excellent problem-solving and analytical skills
+ Strong communication and leadership abilities
_Desired:_
+ Certifications such as JNCIA, JNCIP, CCNA, CCNP, or similar are highly preferred
+ Familiarity with ITIL framework and service management best practices
This position is contingent on funding and may not be filled immediately. However, this position is representative of positions within CACI that are consistently available. Individuals who apply may also be considered for other positions at CACI.
**___**
**What You Can Expect:**
**A culture of integrity.**
At CACI, we place character and innovation at the center of everything we do. As a valued team member, you'll be part of a high-performing group dedicated to our customer's missions and driven by a higher purpose - to ensure the safety of our nation.
**An environment of trust.**
CACI values the unique contributions that every employee brings to our company and our customers - every day. You'll have the autonomy to take the time you need through a unique flexible time off benefit and have access to robust learning resources to make your ambitions a reality.
**A focus on continuous growth.**
Together, we will advance our nation's most critical missions, build on our lengthy track record of business success, and find opportunities to break new ground - in your career and in our legacy.
**Your potential is limitless.** So is ours.
Learn more about CACI here. ( Range** : There are a host of factors that can influence final salary including, but not limited to, geographic location, Federal Government contract labor categories and contract wage rates, relevant prior work experience, specific skills and competencies, education, and certifications. Our employees value the flexibility at CACI that allows them to balance quality work and their personal lives. We offer competitive compensation, benefits and learning and development opportunities. Our broad and competitive mix of benefits options is designed to support and protect employees and their families. At CACI, you will receive comprehensive benefits such as; healthcare, wellness, financial, retirement, family support, continuing education, and time off benefits. Learn more here ( .
Since this position can be worked in more than one location, the range shown is the national average for the position.
The proposed salary range for this position is:
$105,100-$231,100
_CACI is_ _an Equal Opportunity Employer._ _All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, age, national origin, disability, status as a protected veteran, or any_ _other protected characteristic._

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities which are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence.

NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in crafting our groundbreaking and innovating chips, enjoy working in a meaningful, growing and professional environment where you make a significant impact in a technology-focused company.

What you will be doing:

• You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at block level, cluster level, and/or full chip level.

• Analyze and optimize design constraints and synthesis parameters to achieve performance, power, and area targets.

• Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation.

What we need to see:

• Great teammate

• BS (or equivalent experience) in Electrical or Computer Engineering

• 8+ years experience or MS (or equivalent experience) with 2 years experience in Synthesis and Timing.

• Understanding of DFT logic and hands-on experience in design closure.

• Expertise in analyzing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.

• Knowledge in process variation effect modeling and experience in design convergence taking into account process variations.

• Experience in critical path planning and crafting needed.

• Power user of Static Timing tools like Synopsys PrimeTime or Cadence Tempus.

• Solid experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints generation and management, and timing convergence.

• Proficiency in Python, Tcl and Make for automation and scripting tasks.

NVIDIA is widely considered to be the leader of AI computing, and one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and benefits .

Applications for this job will be accepted at least until August 26, 2025. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities which are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence.

NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in crafting our groundbreaking and innovating chips, enjoy working in a meaningful, growing and professional environment where you make a significant impact in a technology-focused company.

What you will be doing:

• You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at block level, cluster level, and/or full chip level.

• Analyze and optimize design constraints and synthesis parameters to achieve performance, power, and area targets.

• Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation.

What we need to see:

• Great teammate

• BS (or equivalent experience) in Electrical or Computer Engineering

• 8+ years experience or MS (or equivalent experience) with 2 years experience in Synthesis and Timing.

• Understanding of DFT logic and hands-on experience in design closure.

• Expertise in analyzing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.

• Knowledge in process variation effect modeling and experience in design convergence taking into account process variations.

• Experience in critical path planning and crafting needed.

• Power user of Static Timing tools like Synopsys PrimeTime or Cadence Tempus.

• Solid experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints generation and management, and timing convergence.

• Proficiency in Python, Tcl and Make for automation and scripting tasks.

NVIDIA is widely considered to be the leader of AI computing, and one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and benefits .

Applications for this job will be accepted at least until August 26, 2025. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Senior ASIC Timing Engineer
Apply ( Location:Offsite, Ann Arbor, Michigan, US
+ Area of InterestEngineer - Hardware
+ Compensation Range153700 USD- 281400 USD
+ Job TypeProfessional
+ Technology InterestAI or Artificial Intelligence, Cloud and Data Center, Networking
+ Job Id1449290
New
The application window is expected to close on 8/25/25.
Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
**Meet the Team**
Join our team at Acacia, where we design advanced optical transceivers for high-speed fiber optic transmission in data centers and telecommunication networks. This team is developing next generation 100G-1T coherent optical communications products.
**Your Impact**
This is a senior contributor role focused on delivering highly-complex ASICS in advanced technology nodes that are used in next generation telecom systems. The role involves detailed running timing analysis and driving timing closure at the full-chip level. This includes providing ECO scripts and guidance to designers for delivering tape-out quality for all parts of the design, in a highly team focused environment.
+ Involves in static timing analysis (STA) methodology and flow. Including but not limited to latest timing technologies, like latest on-chip variation modeling techniques, PVT selection, extraction methodology and flow, etc.
+ Run signoff timing analysis at the top level, drive closure of timing across the team. Interface with EDA vendors on issues/features/enhancements on timing tools.
+ Work closely with RTL designers to debug and root-cause timing issues related to design, tools, etc. and arrive at a feasible solution through the augmentation of input and design collateral.
**Minimum Qualifications:**
+ Bachelor's Degree in electrical engineering with 12 + years, or MS degree with 8 + years, or a PhD with 5+ year of experience
+ Experience in advanced technology nodes 16nm and below
+ Experience with industry standard CAD methodologies from Cadence, Synopsys and/or Mentor
+ Experience with scripting skills such as TCL, Perl, or Python.
+ Experience executing ASICs from product definition to production release.
**Preferred Qualifications:**
+ Experience with FinFET technologies
+ Experience with DSP algorithms
+ Experience in telecom design space
+ Experience presenting technical information to technical and non-technical audience
**Why Cisco?**
At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put - we power the future.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
**Message to applicants applying to work in the U.S. and/or Canada:**
When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees haveaccess ( to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings.
Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days of vacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco's flexible Vacation Time Off policy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco's Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter. Up to 80 hours of unused sick time will be carried forward from one calendar year to the next such that the maximum number of sick time hours an employee may have available is 160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:
.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.

Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep chain-of-thought reasoning.

Etched is seeking an exceptional ASIC Timing Engineer to join our innovative team. The candidate will be responsible for driving timing analysis and closure of our next-generation AI chips, ensuring that we meet the high-performance demands of our unique architecture.

Representative Projects:

• Drive timing analysis and closure of chips at block, cluster, and full chip level
• Collaborate with Physical Design, DFX, Clocks, and other teams to develop timing closure strategies, create timing constraints, and ensure timing and power convergence, as well as ECO implementation
• Enhance timing convergence flows in partnership with our methodology teams
• Contribute to DFT logic understanding and assist with DFT timing closure for various modes, such as scan and BIST
• Work on timing closure of digital logic/macros in AMS designs/IPs, ensuring all aspects are addressed

You maybe a good fit if you have:

• BS (or equivalent experience) in Electrical or Computer Engineering with 5+ years of experience, or MS (or equivalent experience) with 2+ years of experience in Timing and STA
• Hands-on experience in full-chip/sub-chip Static Timing Analysis(STA)/Fishtail, Lint, CDC, RDC checks, and timing convergence, including timing constraints generation and management
• Expertise in analyzing and fixing timing paths through ECOs, with a focus on crosstalk and noise analysis
• In-depth knowledge of RTL to Netlist, industry-standard STA and timing convergence tools
• Familiarity with deep sub-micron process nodes, including modeling and converging timing in these nodes
• Background in domain-specific STA and timing convergence, particularly with GPUs, CPUs, DPUs/Network processors, or SoCs
• Experience in methodology and/or flow development, as well as automation

We encourage you to apply even if you do not believe you meet every single qualification.

How were different:

Etched believes in theBitter Lesson . We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in Cupertino, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

• Full medical, dental, and vision packages, with 100% of premium covered, 90% for dependents
• Housing subsidy of$2,000/month for those living within walking distance of the office
• Daily lunch and dinner in our office
• Relocation support for those moving to Cupertino

Apply for this job

*

indicates a required field

First Name *

Last Name *

Email *

Phone *

Resume/CV *

Enter manually

Accepted file types: pdf, doc, docx, txt, rtf

Enter manually

Accepted file types: pdf, doc, docx, txt, rtf

LinkedIn Profile

Website

Voluntary Self-Identification

For government reporting purposes, we ask candidates to respond to the below self-identification survey.Completion of the form is entirely voluntary. Whatever your decision, it will not be considered in the hiringprocess or thereafter. Any information that you do provide will be recorded and maintained in aconfidential file.

As set forth in Etcheds Equal Employment Opportunity policy,we do not discriminate on the basis of any protected group status under any applicable law.

If you believe you belong to any of the categories of protected veterans listed below, please indicate by making the appropriate selection.As a government contractor subject to the Vietnam Era Veterans Readjustment Assistance Act (VEVRAA), we request this information in order to measurethe effectiveness of the outreach and positive recruitment efforts we undertake pursuant to VEVRAA. Classification of protected categoriesis as follows:

A disabled veteran is one of the following: a veteran of the U.S. military, ground, naval or air service who is entitled to compensation (or who but for the receipt of military retired pay would be entitled to compensation) under laws administered by the Secretary of Veterans Affairs; or a person who was discharged or released from active duty because of a service-connected disability.

A recently separated veteran means any veteran during the three-year period beginning on the date of such veteran's discharge or release from active duty in the U.S. military, ground, naval, or air service.

An active duty wartime or campaign badge veteran means a veteran who served on active duty in the U.S. military, ground, naval or air service during a war, or in a campaign or expedition for which a campaign badge has been authorized under the laws administered by the Department of Defense.

An Armed forces service medal veteran means a veteran who, while serving on active duty in the U.S. military, ground, naval or air service, participated in a United States military operation for which an Armed Forces service medal was awarded pursuant to Executive Order 12985.

Select.

Voluntary Self-Identification of Disability

Form CC-305

Page 1 of 1

OMB Control Number 1250-0005

Expires 04/30/2026

Voluntary Self-Identification of Disability Form CC-305 Page 1 of 1 OMB Control Number 1250-0005 Expires 04/30/2026
Why are you being asked to complete this form?

We are a federal contractor or subcontractor. The law requires us to provide equal employment opportunity to qualified people with disabilities. We have a goal of having at least 7% of our workers as people with disabilities. The law says we must measure our progress towards this goal. To do this, we must ask applicants and employees if they have a disability or have ever had one. People can become disabled, so we need to ask this question at least every five years.

Completing this form is voluntary, and we hope that you will choose to do so. Your answer is confidential. No one who makes hiring decisions will see it. Your decision to complete the form and your answer will not harm you in any way. If you want to learn more about the law or this form, visit the U.S. Department of Labors Office of Federal Contract Compliance Programs (OFCCP) website at .

How do you know if you have a disability?

A disability is a condition that substantially limits one or more of your major life activities. If you have or have ever had such a condition, you are a person with a disability. Disabilities include, but are not limited to:

• Alcohol or other substance use disorder (not currently using drugs illegally)
• Autoimmune disorder, for example, lupus, fibromyalgia, rheumatoid arthritis, HIV/AIDS
• Blind or low vision
• Cancer (past or present)
• Cardiovascular or heart disease
• Celiac disease
• Cerebral palsy
• Deaf or serious difficulty hearing
• Diabetes
• Disfigurement, for example, disfigurement caused by burns, wounds, accidents, or congenital disorders
• Epilepsy or other seizure disorder
• Gastrointestinal disorders, for example, Crohn's Disease, irritable bowel syndrome
• Intellectual or developmental disability
• Mental health conditions, for example, depression, bipolar disorder, anxiety disorder, schizophrenia, PTSD
• Missing limbs or partially missing limbs
• Mobility impairment, benefiting from the use of a wheelchair, scooter, walker, leg brace(s) and/or other supports
• Nervous system condition, for example, migraine headaches, Parkinsons disease, multiple sclerosis (MS)
• Neurodivergence, for example, attention-deficit/hyperactivity disorder (ADHD), autism spectrum disorder, dyslexia, dyspraxia, other learning disabilities
• Partial or complete paralysis (any cause)
• Pulmonary or respiratory conditions, for example, tuberculosis, asthma, emphysema
• Short stature (dwarfism)
• Traumatic brain injury

Disability Status Select.

PUBLIC BURDEN STATEMENT: According to the Paperwork Reduction Act of 1995 no persons are required to respond to a collection of information unless such collection displays a valid OMB control number. This survey should take about 5 minutes to complete.

#J-18808-Ljbffr

RELOCATION ASSISTANCE: Relocation assistance may be available
CLEARANCE TYPE: Secret
TRAVEL: No
**Description**
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.
At the heart of Defining Possible is our commitment to missions. In rapidly changing global security environments, Northrop Grumman brings informed insights and software-secure technology to enable strategic planning. We're looking for innovators who can help us keep building on our wide portfolio of secure, affordable, integrated, and multi-domain systems and technologies that fuel those missions. By joining in our shared mission, we'll support yours of expanding your personal network and developing skills, whether you are new to the field or an industry thought leader. At Northrop Grumman, you'll have the resources, support, and team to do some of the best work of your career.
Northrop Grumman Mission Systems, Digital Technologies Group, is seeking a Static Timing Engineer to join our team of highly qualified, diverse individuals in Digital Technologies. The successful candidate will become part of the Digital Technologies department, which specializes in product designs for a variety of applications from undersea to outer space.
This position will be in Morrisville, NC or Linthicum, MD.
**This position is contingent upon,** **the ability to obtain or maintain an active DoD Secret clearance.**
**Roles and Responsibilities:**
+ Responsible for static timing analysis on digital designs to ensure timing requirements are met
+ Identify timing violations and perform or propose changes to fix them
+ Work closely with design, verification, design-for-test and physical design teams to optimize the timing and improve design performance
+ Develop and validate timing constraints and ensure they are correctly implemented
+ Develop and maintain timing methodologies and flows for efficient timing analysis and closure
+ Conduct design reviews to provide recommendations for meeting timing goals.
+ Troubleshoot timing issues and provide effective solutions.
+ Stay up-to-date with industry trends and advancements in static timing analysis tools and methodologies.
**Basic Qualifications:**
+ Bachelor's degree with 8 years of experience, a Master's degree with 6 years of experience or a Ph.D. with 4 years of experience in Science, Technology, Engineering, Mathematics, or related technical fields; an additional 4 years of experience may be considered in lieu of a degree.
+ U.S. Citizenship is required
+ Ability to obtain/maintain an active secret clearance
+ Proficiency with Cadence and/or Synopsys tools for Static Timing Analysis
+ Proficiency in static timing analysis, noise analysis and timing constraint development
+ Proficiency in multi-mode, multi-corner analysis and optimization
+ Proficiency in scripting languages such as Tcl, Python, or Perl
+ Knowledgeable in HDL (VHDL/Verilog/SystemVerilog)
+ Experience in the full product life cycle of ASIC Design
+ Effective communication and presentation skills and high proficiency in technical problem solving
**Preferred Qualifications:**
+ Master's Degree in Electrical or Computer Engineering
+ Knowledge of Synthesis, Place & Route (P&R), and Design-for-Test (DFT) methodologies
+ Active DoD Secret Clearance or higher
As a full-time employee of Northrop Grumman Mission Systems, you are eligible for our robust benefits package including: 
+ Medical, Dental & Vision coverage
+ 401k
+ Educational Assistance
+ Life Insurance
+ Employee Assistance Programs & Work/Life Solutions
+ Paid Time Off
+ Health & Wellness Resources
+ Employee Discounts 
Link to Benefits:  
This positions standard work schedule is a 9/80. The 9/80 schedule allows employees who work a nine-hour day Monday through Thursday to take every other Friday off. 
Salary Range: $144,200.00 - $216,400.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

RELOCATION ASSISTANCE: Relocation assistance may be available
CLEARANCE TYPE: Secret
TRAVEL: No
**Description**
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.
At the heart of Defining Possible is our commitment to missions. In rapidly changing global security environments, Northrop Grumman brings informed insights and software-secure technology to enable strategic planning. We're looking for innovators who can help us keep building on our wide portfolio of secure, affordable, integrated, and multi-domain systems and technologies that fuel those missions. By joining in our shared mission, we'll support yours of expanding your personal network and developing skills, whether you are new to the field or an industry thought leader. At Northrop Grumman, you'll have the resources, support, and team to do some of the best work of your career.
Northrop Grumman Mission Systems, Digital Technologies Group, is seeking a Static Timing Engineer to join our team of highly qualified, diverse individuals in Digital Technologies. The successful candidate will become part of the Digital Technologies department, which specializes in product designs for a variety of applications from undersea to outer space.
This position will be in Morrisville, NC or Linthicum, MD.
**This position is contingent upon,** **the ability to obtain or maintain an active DoD Secret clearance.**
**Roles and Responsibilities:**
+ Responsible for static timing analysis on digital designs to ensure timing requirements are met
+ Identify timing violations and perform or propose changes to fix them
+ Work closely with design, verification, design-for-test and physical design teams to optimize the timing and improve design performance
+ Develop and validate timing constraints and ensure they are correctly implemented
+ Develop and maintain timing methodologies and flows for efficient timing analysis and closure
+ Conduct design reviews to provide recommendations for meeting timing goals.
+ Troubleshoot timing issues and provide effective solutions.
+ Stay up-to-date with industry trends and advancements in static timing analysis tools and methodologies.
**Basic Qualifications:**
+ Bachelor's degree with 8 years of experience, a Master's degree with 6 years of experience or a Ph.D. with 4 years of experience in Science, Technology, Engineering, Mathematics, or related technical fields; an additional 4 years of experience may be considered in lieu of a degree.
+ U.S. Citizenship is required
+ Ability to obtain/maintain an active secret clearance
+ Proficiency with Cadence and/or Synopsys tools for Static Timing Analysis
+ Proficiency in static timing analysis, noise analysis and timing constraint development
+ Proficiency in multi-mode, multi-corner analysis and optimization
+ Proficiency in scripting languages such as Tcl, Python, or Perl
+ Knowledgeable in HDL (VHDL/Verilog/SystemVerilog)
+ Experience in the full product life cycle of ASIC Design
+ Effective communication and presentation skills and high proficiency in technical problem solving
**Preferred Qualifications:**
+ Master's Degree in Electrical or Computer Engineering
+ Knowledge of Synthesis, Place & Route (P&R), and Design-for-Test (DFT) methodologies
+ Active DoD Secret Clearance or higher
As a full-time employee of Northrop Grumman Mission Systems, you are eligible for our robust benefits package including: 
+ Medical, Dental & Vision coverage
+ 401k
+ Educational Assistance
+ Life Insurance
+ Employee Assistance Programs & Work/Life Solutions
+ Paid Time Off
+ Health & Wellness Resources
+ Employee Discounts 
Link to Benefits:  
This positions standard work schedule is a 9/80. The 9/80 schedule allows employees who work a nine-hour day Monday through Thursday to take every other Friday off. 
Salary Range: $144,200.00 - $216,400.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

THE ROLE:

AMD is seeking a ASIC Design Engineer with specific experience with scripting skills around the EDA tool environments to contribute to the development of an automated digital hardware implementation framework for large SOC designs. The candidate will be responsible for maintaining and enhancing an established push-button automation flow which performs implementation of RTL through pre-netlist synthesis and static timing analysis. He/She will also develop parsers to extract and waive key design metrics from industry standard synthesis and timing reports. These metrics are published to a dashboarding system which the candidate will assist in improving to meet the needs of the RTL design teams.

THE PERSON:

High energy candidates with strong written and verbal communication skills, and structured, well-organized work habits will be successful. Team and goal oriented are essential.

KEY RESPONSIBILITIES:

* Maintain and enhance a fully automated RTL implementation flow environment facilitating pre-netlist synthesis, static timing analysis, and several other design flows
* Produce scripts to extract metrics from EDA tool shells for reporting purposes
* Recommend novel visualizations to incorporate into the reporting tools
* Analyze the automation's architecture and skillfully integrate new features
* Support the automation of other flows such as TCM (timing constraints manager), LINT, DFT( Design for Testing), DRC (design rule checks), CDC (clock domain crossing), RDC (reset domain crossing), and CLP (conformal low power checks) as well as a comprehensive regression solution that encompasses all the above

PREFERRED EXPERIENCE:

* Prior experience developing complex TCL scripts in Synopsys Design Compiler (DC) and PrimeTime (PT)
* Writing custom TCL QC and QoR checks using DC/PT object attributes queries and filters
* Requires a mix of EDA tool competence and TCL-based scripting capability (both in EDA tool environments and stand-alone Linux TCL shell scripts)
* Familiarity not only with synthesis but with the full repertoire of front end (RTL) implementations flows
* Proficient with scripting languages TCL, Perl, Python, CSH
* Proficient with Cron and LSF job control automation
* Strong analytical and problem-solving skills

ACADEMIC CREDENTIALS:

* Bachelor's or Master's degree in Electrical Engineering or Computer Engineering

LOCATION: San Jose, CA

#LI-AP1

#LI-HYBRID

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers' mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do.
L3Harris Technologies is the Trusted Disruptor in the defense industry. With customers' mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security.
Job Title: Electrical Engineer - RF Circuit Design EngineerJob Code: 25017Job Location: Lynchburg, VA or Rochester, NYJob Schedule: 9/80: Employees work 9 out of every 14 days - totaling 80 hours worked - and have every other Friday off
Job Description:The L3Harris Communication Systems segment is seeking an experienced electrical engineer with RF design expertise to join a cross-functional team responsible for designing and manufacturing communications products for public safety and government customers. The electrical engineer who fills this position will join a product development team to design cutting-edge products that incorporate a wide range of wireless communications technologies into mission-critical communications infrastructure and devices. The ideal candidate is skilled in the latest technologies, self-motivated with a strong innovation orientation, and has strong technical leadership skills.
Essential Functions:
+ Design and layout RF circuit boards, including schematic entry and PCB layout
+ Conduct thorough board testing, measurements, and component-level troubleshooting
+ Collaborate across engineering disciplines to ensure successful product development and manufacturing introduction
Qualifications:
+ Bachelor's Degree and minimum 4 years of prior relevant experience. Graduate Degree and a minimum of 2 years of prior related experience. In lieu of a degree, minimum of 8 years of prior related experience.
Preferred Additional Skills:
+ Experience with board schematic entry and PCB layout design
+ Experience in component-level troubleshooting and debugging
+ Experience with product development and manufacturing introduction
+ Familiarity with Land Mobile Radio, LTE, WiFi, Bluetooth, GPS, and other communications technologies
+ Strong debugging and problem-solving skills
+ Effective written and oral communication skills
+ Ability to work effectively with a cross-functional team
In compliance with pay transparency requirements, the salary range for this role in New York State is $79,000 - $146,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.
L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.
Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.
By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions.
L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English ( or Spanish ( . For information regarding your Right To Work, please click here for English ( or Spanish ( .